NSMBW-Decomp
A decompilation of New Super Mario Bros. Wii
Loading...
Searching...
No Matches
GXHardwareBP.h
1#ifndef RVL_SDK_GX_HARDWARE_BP_H
2#define RVL_SDK_GX_HARDWARE_BP_H
3#include <revolution/GX/GXTypes.h>
4#include <types.h>
5#ifdef __cplusplus
6extern "C" {
7#endif
8
9/******************************************************************************
10 *
11 *
12 * GX Blitting Processor (BP)
13 *
14 *
15 *****************************************************************************/
16
17/**
18 * BP registers
19 */
20typedef enum {
21 GX_BP_REG_GENMODE = 0x0,
22 GX_BP_REG_DISPCOPYFILTER0 = 0x1,
23 GX_BP_REG_DISPCOPYFILTER1 = 0x2,
24 GX_BP_REG_DISPCOPYFILTER2 = 0x3,
25 GX_BP_REG_DISPCOPYFILTER3 = 0x4,
26 GX_BP_REG_INDMTX0A = 0x6,
27 GX_BP_REG_INDMTX0B = 0x7,
28 GX_BP_REG_INDMTX0C = 0x8,
29 GX_BP_REG_INDMTX1A = 0x9,
30 GX_BP_REG_INDMTX1B = 0xA,
31 GX_BP_REG_INDMTX1C = 0xB,
32 GX_BP_REG_INDMTX2A = 0xC,
33 GX_BP_REG_INDMTX2B = 0xD,
34 GX_BP_REG_INDMTX2C = 0xE,
35 GX_BP_REG_INDIMASK = 0xF,
36 GX_BP_REG_INDTEVSTAGE0 = 0x10,
37 GX_BP_REG_INDTEVSTAGE1 = 0x11,
38 GX_BP_REG_INDTEVSTAGE2 = 0x12,
39 GX_BP_REG_INDTEVSTAGE3 = 0x13,
40 GX_BP_REG_INDTEVSTAGE4 = 0x14,
41 GX_BP_REG_INDTEVSTAGE5 = 0x15,
42 GX_BP_REG_INDTEVSTAGE6 = 0x16,
43 GX_BP_REG_INDTEVSTAGE7 = 0x17,
44 GX_BP_REG_INDTEVSTAGE8 = 0x18,
45 GX_BP_REG_INDTEVSTAGE9 = 0x19,
46 GX_BP_REG_INDTEVSTAGE10 = 0x1A,
47 GX_BP_REG_INDTEVSTAGE11 = 0x1B,
48 GX_BP_REG_INDTEVSTAGE12 = 0x1C,
49 GX_BP_REG_INDTEVSTAGE13 = 0x1D,
50 GX_BP_REG_INDTEVSTAGE14 = 0x1E,
51 GX_BP_REG_INDTEVSTAGE15 = 0x1F,
52 GX_BP_REG_SCISSORTL = 0x20,
53 GX_BP_REG_SCISSORBR = 0x21,
54 GX_BP_REG_LINEPTWIDTH = 0x22,
55 GX_BP_REG_PERF0TRI = 0x23,
56 GX_BP_REG_PERF0QUAD = 0x24,
57 GX_BP_REG_RAS1_SS0 = 0x25,
58 GX_BP_REG_RAS1_SS1 = 0x26,
59 GX_BP_REG_RAS1_IREF = 0x27,
60 GX_BP_REG_RAS1_TREF0 = 0x28,
61 GX_BP_REG_RAS1_TREF1 = 0x29,
62 GX_BP_REG_RAS1_TREF2 = 0x2A,
63 GX_BP_REG_RAS1_TREF3 = 0x2B,
64 GX_BP_REG_RAS1_TREF4 = 0x2C,
65 GX_BP_REG_RAS1_TREF5 = 0x2D,
66 GX_BP_REG_RAS1_TREF6 = 0x2E,
67 GX_BP_REG_RAS1_TREF7 = 0x2F,
68 GX_BP_REG_SU_SSIZE0 = 0x30,
69 GX_BP_REG_SU_TSIZE0 = 0x31,
70 GX_BP_REG_SU_SSIZE1 = 0x32,
71 GX_BP_REG_SU_TSIZE1 = 0x33,
72 GX_BP_REG_SU_SSIZE2 = 0x34,
73 GX_BP_REG_SU_TSIZE2 = 0x35,
74 GX_BP_REG_SU_SSIZE3 = 0x36,
75 GX_BP_REG_SU_TSIZE3 = 0x37,
76 GX_BP_REG_SU_SSIZE4 = 0x38,
77 GX_BP_REG_SU_TSIZE4 = 0x39,
78 GX_BP_REG_SU_SSIZE5 = 0x3A,
79 GX_BP_REG_SU_TSIZE5 = 0x3B,
80 GX_BP_REG_SU_SSIZE6 = 0x3C,
81 GX_BP_REG_SU_TSIZE6 = 0x3D,
82 GX_BP_REG_SU_SSIZE7 = 0x3E,
83 GX_BP_REG_SU_TSIZE7 = 0x3F,
84 GX_BP_REG_ZMODE = 0x40,
85 GX_BP_REG_BLENDMODE = 0x41,
86 GX_BP_REG_DSTALPHA = 0x42,
87 GX_BP_REG_ZCONTROL = 0x43,
88 GX_BP_REG_FIELDMASK = 0x44,
89 GX_BP_REG_DRAWDONE = 0x45,
90 GX_BP_REG_PETOKEN = 0x47,
91 GX_BP_REG_PETOKENINT = 0x48,
92 GX_BP_REG_TEXCOPYSRCXY = 0x49,
93 GX_BP_REG_TEXCOPYSRCWH = 0x4A,
94 GX_BP_REG_TEXCOPYDST = 0x4B,
95 GX_BP_REG_DISPCOPYSTRIDE = 0x4D,
96 GX_BP_REG_DISPCOPYSCALEY = 0x4E,
97 GX_BP_REG_COPYCLEARAR = 0x4F,
98 GX_BP_REG_COPYCLEARGB = 0x50,
99 GX_BP_REG_COPYCLEARZ = 0x51,
100 GX_BP_REG_COPYFILTER0 = 0x53,
101 GX_BP_REG_COPYFILTER1 = 0x54,
102 GX_BP_REG_BOUNDINGBOX0 = 0x55,
103 GX_BP_REG_BOUNDINGBOX1 = 0x56,
104 GX_BP_REG_SCISSOROFFSET = 0x59,
105 GX_BP_REG_TMEMPRELOADADDR = 0x60,
106 GX_BP_REG_TMEMPRELOADEVEN = 0x61,
107 GX_BP_REG_TMEMPRELOADODD = 0x62,
108 GX_BP_REG_TMEMPRELOADMODE = 0x63,
109 GX_BP_REG_TMEMTLUTSRC = 0x64,
110 GX_BP_REG_TMEMTLUTDST = 0x65,
111 GX_BP_REG_TMEMTEXINVALIDATE = 0x66,
112 GX_BP_REG_PERF1 = 0x67,
113 GX_BP_REG_FIELDMODE = 0x68,
114 GX_BP_REG_SETMODE0_TEX0 = 0x80,
115 GX_BP_REG_SETMODE0_TEX1 = 0x81,
116 GX_BP_REG_SETMODE0_TEX2 = 0x82,
117 GX_BP_REG_SETMODE0_TEX3 = 0x83,
118 GX_BP_REG_SETMODE1_TEX0 = 0x84,
119 GX_BP_REG_SETMODE1_TEX1 = 0x85,
120 GX_BP_REG_SETMODE1_TEX2 = 0x86,
121 GX_BP_REG_SETMODE1_TEX3 = 0x87,
122 GX_BP_REG_SETIMAGE0_TEX0 = 0x88,
123 GX_BP_REG_SETIMAGE0_TEX1 = 0x89,
124 GX_BP_REG_SETIMAGE0_TEX2 = 0x8A,
125 GX_BP_REG_SETIMAGE0_TEX3 = 0x8B,
126 GX_BP_REG_SETIMAGE1_TEX0 = 0x8C,
127 GX_BP_REG_SETIMAGE1_TEX1 = 0x8D,
128 GX_BP_REG_SETIMAGE1_TEX2 = 0x8E,
129 GX_BP_REG_SETIMAGE1_TEX3 = 0x8F,
130 GX_BP_REG_SETIMAGE2_TEX0 = 0x90,
131 GX_BP_REG_SETIMAGE2_TEX1 = 0x91,
132 GX_BP_REG_SETIMAGE2_TEX2 = 0x92,
133 GX_BP_REG_SETIMAGE2_TEX3 = 0x93,
134 GX_BP_REG_SETIMAGE3_TEX0 = 0x94,
135 GX_BP_REG_SETIMAGE3_TEX1 = 0x95,
136 GX_BP_REG_SETIMAGE3_TEX2 = 0x96,
137 GX_BP_REG_SETIMAGE3_TEX3 = 0x97,
138 GX_BP_REG_SETTLUT_TEX0 = 0x98,
139 GX_BP_REG_SETTLUT_TEX1 = 0x99,
140 GX_BP_REG_SETTLUT_TEX2 = 0x9A,
141 GX_BP_REG_SETTLUT_TEX3 = 0x9B,
142 GX_BP_REG_SETMODE0_TEX4 = 0xA0,
143 GX_BP_REG_SETMODE0_TEX5 = 0xA1,
144 GX_BP_REG_SETMODE0_TEX6 = 0xA2,
145 GX_BP_REG_SETMODE0_TEX7 = 0xA3,
146 GX_BP_REG_SETMODE1_TEX4 = 0xA4,
147 GX_BP_REG_SETMODE1_TEX5 = 0xA5,
148 GX_BP_REG_SETMODE1_TEX6 = 0xA6,
149 GX_BP_REG_SETMODE1_TEX7 = 0xA7,
150 GX_BP_REG_SETIMAGE0_TEX4 = 0xA8,
151 GX_BP_REG_SETIMAGE0_TEX5 = 0xA9,
152 GX_BP_REG_SETIMAGE0_TEX6 = 0xAA,
153 GX_BP_REG_SETIMAGE0_TEX7 = 0xAB,
154 GX_BP_REG_SETIMAGE1_TEX4 = 0xAC,
155 GX_BP_REG_SETIMAGE1_TEX5 = 0xAD,
156 GX_BP_REG_SETIMAGE1_TEX6 = 0xAE,
157 GX_BP_REG_SETIMAGE1_TEX7 = 0xAF,
158 GX_BP_REG_SETIMAGE2_TEX4 = 0xB0,
159 GX_BP_REG_SETIMAGE2_TEX5 = 0xB1,
160 GX_BP_REG_SETIMAGE2_TEX6 = 0xB2,
161 GX_BP_REG_SETIMAGE2_TEX7 = 0xB3,
162 GX_BP_REG_SETIMAGE3_TEX4 = 0xB4,
163 GX_BP_REG_SETIMAGE3_TEX5 = 0xB5,
164 GX_BP_REG_SETIMAGE3_TEX6 = 0xB6,
165 GX_BP_REG_SETIMAGE3_TEX7 = 0xB7,
166 GX_BP_REG_SETTLUT_TEX4 = 0xB8,
167 GX_BP_REG_SETTLUT_TEX5 = 0xB9,
168 GX_BP_REG_SETTLUT_TEX6 = 0xBA,
169 GX_BP_REG_SETTLUT_TEX7 = 0xBB,
170 GX_BP_REG_TEVCOLORCOMBINER0 = 0xC0,
171 GX_BP_REG_TEVALPHACOMBINER0 = 0xC1,
172 GX_BP_REG_TEVCOLORCOMBINER1 = 0xC2,
173 GX_BP_REG_TEVALPHACOMBINER1 = 0xC3,
174 GX_BP_REG_TEVCOLORCOMBINER2 = 0xC4,
175 GX_BP_REG_TEVALPHACOMBINER2 = 0xC5,
176 GX_BP_REG_TEVCOLORCOMBINER3 = 0xC6,
177 GX_BP_REG_TEVALPHACOMBINER3 = 0xC7,
178 GX_BP_REG_TEVCOLORCOMBINER4 = 0xC8,
179 GX_BP_REG_TEVALPHACOMBINER4 = 0xC9,
180 GX_BP_REG_TEVCOLORCOMBINER5 = 0xCA,
181 GX_BP_REG_TEVALPHACOMBINER5 = 0xCB,
182 GX_BP_REG_TEVCOLORCOMBINER6 = 0xCC,
183 GX_BP_REG_TEVALPHACOMBINER6 = 0xCD,
184 GX_BP_REG_TEVCOLORCOMBINER7 = 0xCE,
185 GX_BP_REG_TEVALPHACOMBINER7 = 0xCF,
186 GX_BP_REG_TEVCOLORCOMBINER8 = 0xD0,
187 GX_BP_REG_TEVALPHACOMBINER8 = 0xD1,
188 GX_BP_REG_TEVCOLORCOMBINER9 = 0xD2,
189 GX_BP_REG_TEVALPHACOMBINER9 = 0xD3,
190 GX_BP_REG_TEVCOLORCOMBINER10 = 0xD4,
191 GX_BP_REG_TEVALPHACOMBINER10 = 0xD5,
192 GX_BP_REG_TEVCOLORCOMBINER11 = 0xD6,
193 GX_BP_REG_TEVALPHACOMBINER11 = 0xD7,
194 GX_BP_REG_TEVCOLORCOMBINER12 = 0xD8,
195 GX_BP_REG_TEVALPHACOMBINER12 = 0xD9,
196 GX_BP_REG_TEVCOLORCOMBINER13 = 0xDA,
197 GX_BP_REG_TEVALPHACOMBINER13 = 0xDB,
198 GX_BP_REG_TEVCOLORCOMBINER14 = 0xDC,
199 GX_BP_REG_TEVALPHACOMBINER14 = 0xDD,
200 GX_BP_REG_TEVCOLORCOMBINER15 = 0xDE,
201 GX_BP_REG_TEVALPHACOMBINER15 = 0xDF,
202 GX_BP_REG_TEVREG0LO = 0xE0,
203 GX_BP_REG_TEVREG0HI = 0xE1,
204 GX_BP_REG_TEVREG1LO = 0xE2,
205 GX_BP_REG_TEVREG1HI = 0xE3,
206 GX_BP_REG_TEVREG2LO = 0xE4,
207 GX_BP_REG_TEVREG2HI = 0xE5,
208 GX_BP_REG_TEVREG3LO = 0xE6,
209 GX_BP_REG_TEVREG3HI = 0xE7,
210 GX_BP_REG_FOGRANGE = 0xE8,
211 GX_BP_REG_FOGRANGEK0 = 0xE9,
212 GX_BP_REG_FOGRANGEK1 = 0xEA,
213 GX_BP_REG_FOGRANGEK2 = 0xEB,
214 GX_BP_REG_FOGRANGEK3 = 0xEC,
215 GX_BP_REG_FOGRANGEK4 = 0xED,
216 GX_BP_REG_FOGPARAM0 = 0xEE,
217 GX_BP_REG_FOGPARAM1 = 0xEF,
218 GX_BP_REG_FOGPARAM2 = 0xF0,
219 GX_BP_REG_FOGPARAM3 = 0xF1,
220 GX_BP_REG_FOGCOLOR = 0xF2,
221 GX_BP_REG_ALPHACOMPARE = 0xF3,
222 GX_BP_REG_ZTEXTURE0 = 0xF4,
223 GX_BP_REG_ZTEXTURE1 = 0xF5,
224 GX_BP_REG_TEVKSEL0 = 0xF6,
225 GX_BP_REG_TEVKSEL1 = 0xF7,
226 GX_BP_REG_TEVKSEL2 = 0xF8,
227 GX_BP_REG_TEVKSEL3 = 0xF9,
228 GX_BP_REG_TEVKSEL4 = 0xFA,
229 GX_BP_REG_TEVKSEL5 = 0xFB,
230 GX_BP_REG_TEVKSEL6 = 0xFC,
231 GX_BP_REG_TEVKSEL7 = 0xFD,
232 GX_BP_REG_SSMASK = 0xFE,
233} GX_BP_REG;
234
235/******************************************************************************
236 * BP register 0x0 - GenMode
237 *****************************************************************************/
238// NUMTEX [28:31] (4) - Active texture count
239 /* start bit */ #define GX_BP_GENMODE_NUMTEX_B 28
240 /* end bit */ #define GX_BP_GENMODE_NUMTEX_E 31
241 /* bit size */ #define GX_BP_GENMODE_NUMTEX_SZ 4
242
243 /* raw mask */ #define GX_BP_GENMODE_NUMTEX_MASK (((1 << 4) - 1) << 31 - 31)
244 /* local mask */ #define GX_BP_GENMODE_NUMTEX_LMASK ((1 << 4) - 1)
245 /* bit shift */ #define GX_BP_GENMODE_NUMTEX_SHIFT 0
246
247 /* get value */ #define GX_BP_GET_GENMODE_NUMTEX(reg) GX_BITGET((reg), 28, 4)
248 /* set value */ #define GX_BP_SET_GENMODE_NUMTEX(reg, x) ((reg) = GX_BITSET((reg), 28, 4, x))
249
250// NUMCOLORS [25:27] (3) - Color/channel count
251 /* start bit */ #define GX_BP_GENMODE_NUMCOLORS_B 25
252 /* end bit */ #define GX_BP_GENMODE_NUMCOLORS_E 27
253 /* bit size */ #define GX_BP_GENMODE_NUMCOLORS_SZ 3
254
255 /* raw mask */ #define GX_BP_GENMODE_NUMCOLORS_MASK (((1 << 3) - 1) << 31 - 27)
256 /* local mask */ #define GX_BP_GENMODE_NUMCOLORS_LMASK ((1 << 3) - 1)
257 /* bit shift */ #define GX_BP_GENMODE_NUMCOLORS_SHIFT 4
258
259 /* get value */ #define GX_BP_GET_GENMODE_NUMCOLORS(reg) GX_BITGET((reg), 25, 3)
260 /* set value */ #define GX_BP_SET_GENMODE_NUMCOLORS(reg, x) ((reg) = GX_BITSET((reg), 25, 3, x))
261
262// MULTISAMPLE [22:22] (1)
263 /* start bit */ #define GX_BP_GENMODE_MULTISAMPLE_B 22
264 /* end bit */ #define GX_BP_GENMODE_MULTISAMPLE_E 22
265 /* bit size */ #define GX_BP_GENMODE_MULTISAMPLE_SZ 1
266
267 /* raw mask */ #define GX_BP_GENMODE_MULTISAMPLE_MASK (((1 << 1) - 1) << 31 - 22)
268 /* local mask */ #define GX_BP_GENMODE_MULTISAMPLE_LMASK ((1 << 1) - 1)
269 /* bit shift */ #define GX_BP_GENMODE_MULTISAMPLE_SHIFT 9
270
271 /* get value */ #define GX_BP_GET_GENMODE_MULTISAMPLE(reg) GX_BITGET((reg), 22, 1)
272 /* set value */ #define GX_BP_SET_GENMODE_MULTISAMPLE(reg, x) ((reg) = GX_BITSET((reg), 22, 1, x))
273
274// NUMTEVSTAGES [18:21] (4)
275 /* start bit */ #define GX_BP_GENMODE_NUMTEVSTAGES_B 18
276 /* end bit */ #define GX_BP_GENMODE_NUMTEVSTAGES_E 21
277 /* bit size */ #define GX_BP_GENMODE_NUMTEVSTAGES_SZ 4
278
279 /* raw mask */ #define GX_BP_GENMODE_NUMTEVSTAGES_MASK (((1 << 4) - 1) << 31 - 21)
280 /* local mask */ #define GX_BP_GENMODE_NUMTEVSTAGES_LMASK ((1 << 4) - 1)
281 /* bit shift */ #define GX_BP_GENMODE_NUMTEVSTAGES_SHIFT 10
282
283 /* get value */ #define GX_BP_GET_GENMODE_NUMTEVSTAGES(reg) GX_BITGET((reg), 18, 4)
284 /* set value */ #define GX_BP_SET_GENMODE_NUMTEVSTAGES(reg, x) ((reg) = GX_BITSET((reg), 18, 4, x))
285
286// CULLMODE [16:17] (2)
287 /* start bit */ #define GX_BP_GENMODE_CULLMODE_B 16
288 /* end bit */ #define GX_BP_GENMODE_CULLMODE_E 17
289 /* bit size */ #define GX_BP_GENMODE_CULLMODE_SZ 2
290
291 /* raw mask */ #define GX_BP_GENMODE_CULLMODE_MASK (((1 << 2) - 1) << 31 - 17)
292 /* local mask */ #define GX_BP_GENMODE_CULLMODE_LMASK ((1 << 2) - 1)
293 /* bit shift */ #define GX_BP_GENMODE_CULLMODE_SHIFT 14
294
295 /* get value */ #define GX_BP_GET_GENMODE_CULLMODE(reg) GX_BITGET((reg), 16, 2)
296 /* set value */ #define GX_BP_SET_GENMODE_CULLMODE(reg, x) ((reg) = GX_BITSET((reg), 16, 2, x))
297
298// NUMINDSTAGES [13:15] (3)
299 /* start bit */ #define GX_BP_GENMODE_NUMINDSTAGES_B 13
300 /* end bit */ #define GX_BP_GENMODE_NUMINDSTAGES_E 15
301 /* bit size */ #define GX_BP_GENMODE_NUMINDSTAGES_SZ 3
302
303 /* raw mask */ #define GX_BP_GENMODE_NUMINDSTAGES_MASK (((1 << 3) - 1) << 31 - 15)
304 /* local mask */ #define GX_BP_GENMODE_NUMINDSTAGES_LMASK ((1 << 3) - 1)
305 /* bit shift */ #define GX_BP_GENMODE_NUMINDSTAGES_SHIFT 16
306
307 /* get value */ #define GX_BP_GET_GENMODE_NUMINDSTAGES(reg) GX_BITGET((reg), 13, 3)
308 /* set value */ #define GX_BP_SET_GENMODE_NUMINDSTAGES(reg, x) ((reg) = GX_BITSET((reg), 13, 3, x))
309
310// COPLANAR [12:12] (1) - Toggle co-planar ("Z freeze" according to Dolphin)
311 /* start bit */ #define GX_BP_GENMODE_COPLANAR_B 12
312 /* end bit */ #define GX_BP_GENMODE_COPLANAR_E 12
313 /* bit size */ #define GX_BP_GENMODE_COPLANAR_SZ 1
314
315 /* raw mask */ #define GX_BP_GENMODE_COPLANAR_MASK (((1 << 1) - 1) << 31 - 12)
316 /* local mask */ #define GX_BP_GENMODE_COPLANAR_LMASK ((1 << 1) - 1)
317 /* bit shift */ #define GX_BP_GENMODE_COPLANAR_SHIFT 19
318
319 /* get value */ #define GX_BP_GET_GENMODE_COPLANAR(reg) GX_BITGET((reg), 12, 1)
320 /* set value */ #define GX_BP_SET_GENMODE_COPLANAR(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
321
322
323/******************************************************************************
324 * BP structure - IndMtxA
325 *****************************************************************************/
326// M00 [21:31] (11) - Texture offset matrix #0 [0][0]
327 /* start bit */ #define GX_BP_INDMTXA_M00_B 21
328 /* end bit */ #define GX_BP_INDMTXA_M00_E 31
329 /* bit size */ #define GX_BP_INDMTXA_M00_SZ 11
330
331 /* raw mask */ #define GX_BP_INDMTXA_M00_MASK (((1 << 11) - 1) << 31 - 31)
332 /* local mask */ #define GX_BP_INDMTXA_M00_LMASK ((1 << 11) - 1)
333 /* bit shift */ #define GX_BP_INDMTXA_M00_SHIFT 0
334
335 /* get value */ #define GX_BP_GET_INDMTXA_M00(reg) GX_BITGET((reg), 21, 11)
336 /* set value */ #define GX_BP_SET_INDMTXA_M00(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
337
338// M10 [10:20] (11) - Texture offset matrix #0 [1][0]
339 /* start bit */ #define GX_BP_INDMTXA_M10_B 10
340 /* end bit */ #define GX_BP_INDMTXA_M10_E 20
341 /* bit size */ #define GX_BP_INDMTXA_M10_SZ 11
342
343 /* raw mask */ #define GX_BP_INDMTXA_M10_MASK (((1 << 11) - 1) << 31 - 20)
344 /* local mask */ #define GX_BP_INDMTXA_M10_LMASK ((1 << 11) - 1)
345 /* bit shift */ #define GX_BP_INDMTXA_M10_SHIFT 11
346
347 /* get value */ #define GX_BP_GET_INDMTXA_M10(reg) GX_BITGET((reg), 10, 11)
348 /* set value */ #define GX_BP_SET_INDMTXA_M10(reg, x) ((reg) = GX_BITSET((reg), 10, 11, x))
349
350// EXP [8:9] (2) - Bits 0-1 of scaling exponent #0 (2^x)
351 /* start bit */ #define GX_BP_INDMTXA_EXP_B 8
352 /* end bit */ #define GX_BP_INDMTXA_EXP_E 9
353 /* bit size */ #define GX_BP_INDMTXA_EXP_SZ 2
354
355 /* raw mask */ #define GX_BP_INDMTXA_EXP_MASK (((1 << 2) - 1) << 31 - 9)
356 /* local mask */ #define GX_BP_INDMTXA_EXP_LMASK ((1 << 2) - 1)
357 /* bit shift */ #define GX_BP_INDMTXA_EXP_SHIFT 22
358
359 /* get value */ #define GX_BP_GET_INDMTXA_EXP(reg) GX_BITGET((reg), 8, 2)
360 /* set value */ #define GX_BP_SET_INDMTXA_EXP(reg, x) ((reg) = GX_BITSET((reg), 8, 2, x))
361
362
363/******************************************************************************
364 * BP structure - IndMtxB
365 *****************************************************************************/
366// M01 [21:31] (11) - Texture offset matrix #0 [0][1]
367 /* start bit */ #define GX_BP_INDMTXB_M01_B 21
368 /* end bit */ #define GX_BP_INDMTXB_M01_E 31
369 /* bit size */ #define GX_BP_INDMTXB_M01_SZ 11
370
371 /* raw mask */ #define GX_BP_INDMTXB_M01_MASK (((1 << 11) - 1) << 31 - 31)
372 /* local mask */ #define GX_BP_INDMTXB_M01_LMASK ((1 << 11) - 1)
373 /* bit shift */ #define GX_BP_INDMTXB_M01_SHIFT 0
374
375 /* get value */ #define GX_BP_GET_INDMTXB_M01(reg) GX_BITGET((reg), 21, 11)
376 /* set value */ #define GX_BP_SET_INDMTXB_M01(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
377
378// M11 [10:20] (11) - Texture offset matrix #0 [1][1]
379 /* start bit */ #define GX_BP_INDMTXB_M11_B 10
380 /* end bit */ #define GX_BP_INDMTXB_M11_E 20
381 /* bit size */ #define GX_BP_INDMTXB_M11_SZ 11
382
383 /* raw mask */ #define GX_BP_INDMTXB_M11_MASK (((1 << 11) - 1) << 31 - 20)
384 /* local mask */ #define GX_BP_INDMTXB_M11_LMASK ((1 << 11) - 1)
385 /* bit shift */ #define GX_BP_INDMTXB_M11_SHIFT 11
386
387 /* get value */ #define GX_BP_GET_INDMTXB_M11(reg) GX_BITGET((reg), 10, 11)
388 /* set value */ #define GX_BP_SET_INDMTXB_M11(reg, x) ((reg) = GX_BITSET((reg), 10, 11, x))
389
390// EXP [8:9] (2) - Bits 2-3 of scaling exponent #0 (2^x)
391 /* start bit */ #define GX_BP_INDMTXB_EXP_B 8
392 /* end bit */ #define GX_BP_INDMTXB_EXP_E 9
393 /* bit size */ #define GX_BP_INDMTXB_EXP_SZ 2
394
395 /* raw mask */ #define GX_BP_INDMTXB_EXP_MASK (((1 << 2) - 1) << 31 - 9)
396 /* local mask */ #define GX_BP_INDMTXB_EXP_LMASK ((1 << 2) - 1)
397 /* bit shift */ #define GX_BP_INDMTXB_EXP_SHIFT 22
398
399 /* get value */ #define GX_BP_GET_INDMTXB_EXP(reg) GX_BITGET((reg), 8, 2)
400 /* set value */ #define GX_BP_SET_INDMTXB_EXP(reg, x) ((reg) = GX_BITSET((reg), 8, 2, x))
401
402
403/******************************************************************************
404 * BP structure - IndMtxC
405 *****************************************************************************/
406// M02 [21:31] (11) - Texture offset matrix #0 [0][2]
407 /* start bit */ #define GX_BP_INDMTXC_M02_B 21
408 /* end bit */ #define GX_BP_INDMTXC_M02_E 31
409 /* bit size */ #define GX_BP_INDMTXC_M02_SZ 11
410
411 /* raw mask */ #define GX_BP_INDMTXC_M02_MASK (((1 << 11) - 1) << 31 - 31)
412 /* local mask */ #define GX_BP_INDMTXC_M02_LMASK ((1 << 11) - 1)
413 /* bit shift */ #define GX_BP_INDMTXC_M02_SHIFT 0
414
415 /* get value */ #define GX_BP_GET_INDMTXC_M02(reg) GX_BITGET((reg), 21, 11)
416 /* set value */ #define GX_BP_SET_INDMTXC_M02(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
417
418// M12 [10:20] (11) - Texture offset matrix #0 [1][2]
419 /* start bit */ #define GX_BP_INDMTXC_M12_B 10
420 /* end bit */ #define GX_BP_INDMTXC_M12_E 20
421 /* bit size */ #define GX_BP_INDMTXC_M12_SZ 11
422
423 /* raw mask */ #define GX_BP_INDMTXC_M12_MASK (((1 << 11) - 1) << 31 - 20)
424 /* local mask */ #define GX_BP_INDMTXC_M12_LMASK ((1 << 11) - 1)
425 /* bit shift */ #define GX_BP_INDMTXC_M12_SHIFT 11
426
427 /* get value */ #define GX_BP_GET_INDMTXC_M12(reg) GX_BITGET((reg), 10, 11)
428 /* set value */ #define GX_BP_SET_INDMTXC_M12(reg, x) ((reg) = GX_BITSET((reg), 10, 11, x))
429
430// EXP [8:9] (2) - Bit 4 of scaling exponent #0 (2^x)
431 /* start bit */ #define GX_BP_INDMTXC_EXP_B 8
432 /* end bit */ #define GX_BP_INDMTXC_EXP_E 9
433 /* bit size */ #define GX_BP_INDMTXC_EXP_SZ 2
434
435 /* raw mask */ #define GX_BP_INDMTXC_EXP_MASK (((1 << 2) - 1) << 31 - 9)
436 /* local mask */ #define GX_BP_INDMTXC_EXP_LMASK ((1 << 2) - 1)
437 /* bit shift */ #define GX_BP_INDMTXC_EXP_SHIFT 22
438
439 /* get value */ #define GX_BP_GET_INDMTXC_EXP(reg) GX_BITGET((reg), 8, 2)
440 /* set value */ #define GX_BP_SET_INDMTXC_EXP(reg, x) ((reg) = GX_BITSET((reg), 8, 2, x))
441
442
443/******************************************************************************
444 * BP register 0xF - IndIMask
445 *****************************************************************************/
446// IMASK [24:31] (8) - Indirect mask for textures
447 /* start bit */ #define GX_BP_INDIMASK_IMASK_B 24
448 /* end bit */ #define GX_BP_INDIMASK_IMASK_E 31
449 /* bit size */ #define GX_BP_INDIMASK_IMASK_SZ 8
450
451 /* raw mask */ #define GX_BP_INDIMASK_IMASK_MASK (((1 << 8) - 1) << 31 - 31)
452 /* local mask */ #define GX_BP_INDIMASK_IMASK_LMASK ((1 << 8) - 1)
453 /* bit shift */ #define GX_BP_INDIMASK_IMASK_SHIFT 0
454
455 /* get value */ #define GX_BP_GET_INDIMASK_IMASK(reg) GX_BITGET((reg), 24, 8)
456 /* set value */ #define GX_BP_SET_INDIMASK_IMASK(reg, x) ((reg) = GX_BITSET((reg), 24, 8, x))
457
458
459/******************************************************************************
460 * BP structure - IndTevStage
461 *****************************************************************************/
462// STAGE [30:31] (2) - Indirect texture stage ID
463 /* start bit */ #define GX_BP_INDTEVSTAGE_STAGE_B 30
464 /* end bit */ #define GX_BP_INDTEVSTAGE_STAGE_E 31
465 /* bit size */ #define GX_BP_INDTEVSTAGE_STAGE_SZ 2
466
467 /* raw mask */ #define GX_BP_INDTEVSTAGE_STAGE_MASK (((1 << 2) - 1) << 31 - 31)
468 /* local mask */ #define GX_BP_INDTEVSTAGE_STAGE_LMASK ((1 << 2) - 1)
469 /* bit shift */ #define GX_BP_INDTEVSTAGE_STAGE_SHIFT 0
470
471 /* get value */ #define GX_BP_GET_INDTEVSTAGE_STAGE(reg) GX_BITGET((reg), 30, 2)
472 /* set value */ #define GX_BP_SET_INDTEVSTAGE_STAGE(reg, x) ((reg) = GX_BITSET((reg), 30, 2, x))
473
474// FORMAT [28:29] (2) - Indirect texture format
475 /* start bit */ #define GX_BP_INDTEVSTAGE_FORMAT_B 28
476 /* end bit */ #define GX_BP_INDTEVSTAGE_FORMAT_E 29
477 /* bit size */ #define GX_BP_INDTEVSTAGE_FORMAT_SZ 2
478
479 /* raw mask */ #define GX_BP_INDTEVSTAGE_FORMAT_MASK (((1 << 2) - 1) << 31 - 29)
480 /* local mask */ #define GX_BP_INDTEVSTAGE_FORMAT_LMASK ((1 << 2) - 1)
481 /* bit shift */ #define GX_BP_INDTEVSTAGE_FORMAT_SHIFT 2
482
483 /* get value */ #define GX_BP_GET_INDTEVSTAGE_FORMAT(reg) GX_BITGET((reg), 28, 2)
484 /* set value */ #define GX_BP_SET_INDTEVSTAGE_FORMAT(reg, x) ((reg) = GX_BITSET((reg), 28, 2, x))
485
486// BIAS [25:27] (3) - Indirect texture bias
487 /* start bit */ #define GX_BP_INDTEVSTAGE_BIAS_B 25
488 /* end bit */ #define GX_BP_INDTEVSTAGE_BIAS_E 27
489 /* bit size */ #define GX_BP_INDTEVSTAGE_BIAS_SZ 3
490
491 /* raw mask */ #define GX_BP_INDTEVSTAGE_BIAS_MASK (((1 << 3) - 1) << 31 - 27)
492 /* local mask */ #define GX_BP_INDTEVSTAGE_BIAS_LMASK ((1 << 3) - 1)
493 /* bit shift */ #define GX_BP_INDTEVSTAGE_BIAS_SHIFT 4
494
495 /* get value */ #define GX_BP_GET_INDTEVSTAGE_BIAS(reg) GX_BITGET((reg), 25, 3)
496 /* set value */ #define GX_BP_SET_INDTEVSTAGE_BIAS(reg, x) ((reg) = GX_BITSET((reg), 25, 3, x))
497
498// ALPHA [23:24] (2) - Indirect texture alpha
499 /* start bit */ #define GX_BP_INDTEVSTAGE_ALPHA_B 23
500 /* end bit */ #define GX_BP_INDTEVSTAGE_ALPHA_E 24
501 /* bit size */ #define GX_BP_INDTEVSTAGE_ALPHA_SZ 2
502
503 /* raw mask */ #define GX_BP_INDTEVSTAGE_ALPHA_MASK (((1 << 2) - 1) << 31 - 24)
504 /* local mask */ #define GX_BP_INDTEVSTAGE_ALPHA_LMASK ((1 << 2) - 1)
505 /* bit shift */ #define GX_BP_INDTEVSTAGE_ALPHA_SHIFT 7
506
507 /* get value */ #define GX_BP_GET_INDTEVSTAGE_ALPHA(reg) GX_BITGET((reg), 23, 2)
508 /* set value */ #define GX_BP_SET_INDTEVSTAGE_ALPHA(reg, x) ((reg) = GX_BITSET((reg), 23, 2, x))
509
510// MTX [19:22] (4) - Indirect texture matrix
511 /* start bit */ #define GX_BP_INDTEVSTAGE_MTX_B 19
512 /* end bit */ #define GX_BP_INDTEVSTAGE_MTX_E 22
513 /* bit size */ #define GX_BP_INDTEVSTAGE_MTX_SZ 4
514
515 /* raw mask */ #define GX_BP_INDTEVSTAGE_MTX_MASK (((1 << 4) - 1) << 31 - 22)
516 /* local mask */ #define GX_BP_INDTEVSTAGE_MTX_LMASK ((1 << 4) - 1)
517 /* bit shift */ #define GX_BP_INDTEVSTAGE_MTX_SHIFT 9
518
519 /* get value */ #define GX_BP_GET_INDTEVSTAGE_MTX(reg) GX_BITGET((reg), 19, 4)
520 /* set value */ #define GX_BP_SET_INDTEVSTAGE_MTX(reg, x) ((reg) = GX_BITSET((reg), 19, 4, x))
521
522// WRAPS [16:18] (3) - S component wrap factor
523 /* start bit */ #define GX_BP_INDTEVSTAGE_WRAPS_B 16
524 /* end bit */ #define GX_BP_INDTEVSTAGE_WRAPS_E 18
525 /* bit size */ #define GX_BP_INDTEVSTAGE_WRAPS_SZ 3
526
527 /* raw mask */ #define GX_BP_INDTEVSTAGE_WRAPS_MASK (((1 << 3) - 1) << 31 - 18)
528 /* local mask */ #define GX_BP_INDTEVSTAGE_WRAPS_LMASK ((1 << 3) - 1)
529 /* bit shift */ #define GX_BP_INDTEVSTAGE_WRAPS_SHIFT 13
530
531 /* get value */ #define GX_BP_GET_INDTEVSTAGE_WRAPS(reg) GX_BITGET((reg), 16, 3)
532 /* set value */ #define GX_BP_SET_INDTEVSTAGE_WRAPS(reg, x) ((reg) = GX_BITSET((reg), 16, 3, x))
533
534// WRAPT [13:15] (3) - T component wrap factor
535 /* start bit */ #define GX_BP_INDTEVSTAGE_WRAPT_B 13
536 /* end bit */ #define GX_BP_INDTEVSTAGE_WRAPT_E 15
537 /* bit size */ #define GX_BP_INDTEVSTAGE_WRAPT_SZ 3
538
539 /* raw mask */ #define GX_BP_INDTEVSTAGE_WRAPT_MASK (((1 << 3) - 1) << 31 - 15)
540 /* local mask */ #define GX_BP_INDTEVSTAGE_WRAPT_LMASK ((1 << 3) - 1)
541 /* bit shift */ #define GX_BP_INDTEVSTAGE_WRAPT_SHIFT 16
542
543 /* get value */ #define GX_BP_GET_INDTEVSTAGE_WRAPT(reg) GX_BITGET((reg), 13, 3)
544 /* set value */ #define GX_BP_SET_INDTEVSTAGE_WRAPT(reg, x) ((reg) = GX_BITSET((reg), 13, 3, x))
545
546// UTCLOD [12:12] (1) - Whether to use unmodified texcoords for mipmaps
547 /* start bit */ #define GX_BP_INDTEVSTAGE_UTCLOD_B 12
548 /* end bit */ #define GX_BP_INDTEVSTAGE_UTCLOD_E 12
549 /* bit size */ #define GX_BP_INDTEVSTAGE_UTCLOD_SZ 1
550
551 /* raw mask */ #define GX_BP_INDTEVSTAGE_UTCLOD_MASK (((1 << 1) - 1) << 31 - 12)
552 /* local mask */ #define GX_BP_INDTEVSTAGE_UTCLOD_LMASK ((1 << 1) - 1)
553 /* bit shift */ #define GX_BP_INDTEVSTAGE_UTCLOD_SHIFT 19
554
555 /* get value */ #define GX_BP_GET_INDTEVSTAGE_UTCLOD(reg) GX_BITGET((reg), 12, 1)
556 /* set value */ #define GX_BP_SET_INDTEVSTAGE_UTCLOD(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
557
558// ADDPREV [11:11] (1) - Whether to add in results from previous tev stage
559 /* start bit */ #define GX_BP_INDTEVSTAGE_ADDPREV_B 11
560 /* end bit */ #define GX_BP_INDTEVSTAGE_ADDPREV_E 11
561 /* bit size */ #define GX_BP_INDTEVSTAGE_ADDPREV_SZ 1
562
563 /* raw mask */ #define GX_BP_INDTEVSTAGE_ADDPREV_MASK (((1 << 1) - 1) << 31 - 11)
564 /* local mask */ #define GX_BP_INDTEVSTAGE_ADDPREV_LMASK ((1 << 1) - 1)
565 /* bit shift */ #define GX_BP_INDTEVSTAGE_ADDPREV_SHIFT 20
566
567 /* get value */ #define GX_BP_GET_INDTEVSTAGE_ADDPREV(reg) GX_BITGET((reg), 11, 1)
568 /* set value */ #define GX_BP_SET_INDTEVSTAGE_ADDPREV(reg, x) ((reg) = GX_BITSET((reg), 11, 1, x))
569
570
571/******************************************************************************
572 * BP register 0x20 - scissorTL
573 *****************************************************************************/
574// TOP [21:31] (11) - Top component
575 /* start bit */ #define GX_BP_SCISSORTL_TOP_B 21
576 /* end bit */ #define GX_BP_SCISSORTL_TOP_E 31
577 /* bit size */ #define GX_BP_SCISSORTL_TOP_SZ 11
578
579 /* raw mask */ #define GX_BP_SCISSORTL_TOP_MASK (((1 << 11) - 1) << 31 - 31)
580 /* local mask */ #define GX_BP_SCISSORTL_TOP_LMASK ((1 << 11) - 1)
581 /* bit shift */ #define GX_BP_SCISSORTL_TOP_SHIFT 0
582
583 /* get value */ #define GX_BP_GET_SCISSORTL_TOP(reg) GX_BITGET((reg), 21, 11)
584 /* set value */ #define GX_BP_SET_SCISSORTL_TOP(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
585
586// LEFT [9:19] (11) - Left component
587 /* start bit */ #define GX_BP_SCISSORTL_LEFT_B 9
588 /* end bit */ #define GX_BP_SCISSORTL_LEFT_E 19
589 /* bit size */ #define GX_BP_SCISSORTL_LEFT_SZ 11
590
591 /* raw mask */ #define GX_BP_SCISSORTL_LEFT_MASK (((1 << 11) - 1) << 31 - 19)
592 /* local mask */ #define GX_BP_SCISSORTL_LEFT_LMASK ((1 << 11) - 1)
593 /* bit shift */ #define GX_BP_SCISSORTL_LEFT_SHIFT 12
594
595 /* get value */ #define GX_BP_GET_SCISSORTL_LEFT(reg) GX_BITGET((reg), 9, 11)
596 /* set value */ #define GX_BP_SET_SCISSORTL_LEFT(reg, x) ((reg) = GX_BITSET((reg), 9, 11, x))
597
598
599/******************************************************************************
600 * BP register 0x21 - scissorBR
601 *****************************************************************************/
602// BOT [21:31] (11) - Bottom component
603 /* start bit */ #define GX_BP_SCISSORBR_BOT_B 21
604 /* end bit */ #define GX_BP_SCISSORBR_BOT_E 31
605 /* bit size */ #define GX_BP_SCISSORBR_BOT_SZ 11
606
607 /* raw mask */ #define GX_BP_SCISSORBR_BOT_MASK (((1 << 11) - 1) << 31 - 31)
608 /* local mask */ #define GX_BP_SCISSORBR_BOT_LMASK ((1 << 11) - 1)
609 /* bit shift */ #define GX_BP_SCISSORBR_BOT_SHIFT 0
610
611 /* get value */ #define GX_BP_GET_SCISSORBR_BOT(reg) GX_BITGET((reg), 21, 11)
612 /* set value */ #define GX_BP_SET_SCISSORBR_BOT(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
613
614// RIGHT [9:19] (11) - Right component
615 /* start bit */ #define GX_BP_SCISSORBR_RIGHT_B 9
616 /* end bit */ #define GX_BP_SCISSORBR_RIGHT_E 19
617 /* bit size */ #define GX_BP_SCISSORBR_RIGHT_SZ 11
618
619 /* raw mask */ #define GX_BP_SCISSORBR_RIGHT_MASK (((1 << 11) - 1) << 31 - 19)
620 /* local mask */ #define GX_BP_SCISSORBR_RIGHT_LMASK ((1 << 11) - 1)
621 /* bit shift */ #define GX_BP_SCISSORBR_RIGHT_SHIFT 12
622
623 /* get value */ #define GX_BP_GET_SCISSORBR_RIGHT(reg) GX_BITGET((reg), 9, 11)
624 /* set value */ #define GX_BP_SET_SCISSORBR_RIGHT(reg, x) ((reg) = GX_BITSET((reg), 9, 11, x))
625
626
627/******************************************************************************
628 * BP register 0x22 - linePtWidth
629 *****************************************************************************/
630// LINESZ [24:31] (8) - Line size/width
631 /* start bit */ #define GX_BP_LINEPTWIDTH_LINESZ_B 24
632 /* end bit */ #define GX_BP_LINEPTWIDTH_LINESZ_E 31
633 /* bit size */ #define GX_BP_LINEPTWIDTH_LINESZ_SZ 8
634
635 /* raw mask */ #define GX_BP_LINEPTWIDTH_LINESZ_MASK (((1 << 8) - 1) << 31 - 31)
636 /* local mask */ #define GX_BP_LINEPTWIDTH_LINESZ_LMASK ((1 << 8) - 1)
637 /* bit shift */ #define GX_BP_LINEPTWIDTH_LINESZ_SHIFT 0
638
639 /* get value */ #define GX_BP_GET_LINEPTWIDTH_LINESZ(reg) GX_BITGET((reg), 24, 8)
640 /* set value */ #define GX_BP_SET_LINEPTWIDTH_LINESZ(reg, x) ((reg) = GX_BITSET((reg), 24, 8, x))
641
642// POINTSZ [16:23] (8) - Point size
643 /* start bit */ #define GX_BP_LINEPTWIDTH_POINTSZ_B 16
644 /* end bit */ #define GX_BP_LINEPTWIDTH_POINTSZ_E 23
645 /* bit size */ #define GX_BP_LINEPTWIDTH_POINTSZ_SZ 8
646
647 /* raw mask */ #define GX_BP_LINEPTWIDTH_POINTSZ_MASK (((1 << 8) - 1) << 31 - 23)
648 /* local mask */ #define GX_BP_LINEPTWIDTH_POINTSZ_LMASK ((1 << 8) - 1)
649 /* bit shift */ #define GX_BP_LINEPTWIDTH_POINTSZ_SHIFT 8
650
651 /* get value */ #define GX_BP_GET_LINEPTWIDTH_POINTSZ(reg) GX_BITGET((reg), 16, 8)
652 /* set value */ #define GX_BP_SET_LINEPTWIDTH_POINTSZ(reg, x) ((reg) = GX_BITSET((reg), 16, 8, x))
653
654// LINEOFS [13:15] (3) - Line offset
655 /* start bit */ #define GX_BP_LINEPTWIDTH_LINEOFS_B 13
656 /* end bit */ #define GX_BP_LINEPTWIDTH_LINEOFS_E 15
657 /* bit size */ #define GX_BP_LINEPTWIDTH_LINEOFS_SZ 3
658
659 /* raw mask */ #define GX_BP_LINEPTWIDTH_LINEOFS_MASK (((1 << 3) - 1) << 31 - 15)
660 /* local mask */ #define GX_BP_LINEPTWIDTH_LINEOFS_LMASK ((1 << 3) - 1)
661 /* bit shift */ #define GX_BP_LINEPTWIDTH_LINEOFS_SHIFT 16
662
663 /* get value */ #define GX_BP_GET_LINEPTWIDTH_LINEOFS(reg) GX_BITGET((reg), 13, 3)
664 /* set value */ #define GX_BP_SET_LINEPTWIDTH_LINEOFS(reg, x) ((reg) = GX_BITSET((reg), 13, 3, x))
665
666// POINTOFS [10:12] (3) - Point offset
667 /* start bit */ #define GX_BP_LINEPTWIDTH_POINTOFS_B 10
668 /* end bit */ #define GX_BP_LINEPTWIDTH_POINTOFS_E 12
669 /* bit size */ #define GX_BP_LINEPTWIDTH_POINTOFS_SZ 3
670
671 /* raw mask */ #define GX_BP_LINEPTWIDTH_POINTOFS_MASK (((1 << 3) - 1) << 31 - 12)
672 /* local mask */ #define GX_BP_LINEPTWIDTH_POINTOFS_LMASK ((1 << 3) - 1)
673 /* bit shift */ #define GX_BP_LINEPTWIDTH_POINTOFS_SHIFT 19
674
675 /* get value */ #define GX_BP_GET_LINEPTWIDTH_POINTOFS(reg) GX_BITGET((reg), 10, 3)
676 /* set value */ #define GX_BP_SET_LINEPTWIDTH_POINTOFS(reg, x) ((reg) = GX_BITSET((reg), 10, 3, x))
677
678// ADJUST_AR [9:9] (1) - Interlacing: adjust for pixels having aspect ratio of 1/2
679 /* start bit */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_B 9
680 /* end bit */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_E 9
681 /* bit size */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_SZ 1
682
683 /* raw mask */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_MASK (((1 << 1) - 1) << 31 - 9)
684 /* local mask */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_LMASK ((1 << 1) - 1)
685 /* bit shift */ #define GX_BP_LINEPTWIDTH_ADJUST_AR_SHIFT 22
686
687 /* get value */ #define GX_BP_GET_LINEPTWIDTH_ADJUST_AR(reg) GX_BITGET((reg), 9, 1)
688 /* set value */ #define GX_BP_SET_LINEPTWIDTH_ADJUST_AR(reg, x) ((reg) = GX_BITSET((reg), 9, 1, x))
689
690
691/******************************************************************************
692 * BP register 0x25 - ras1_ss0
693 *****************************************************************************/
694// S0 [28:31] (4) - S-component scale (stage 0)
695 /* start bit */ #define GX_BP_RAS1_SS0_S0_B 28
696 /* end bit */ #define GX_BP_RAS1_SS0_S0_E 31
697 /* bit size */ #define GX_BP_RAS1_SS0_S0_SZ 4
698
699 /* raw mask */ #define GX_BP_RAS1_SS0_S0_MASK (((1 << 4) - 1) << 31 - 31)
700 /* local mask */ #define GX_BP_RAS1_SS0_S0_LMASK ((1 << 4) - 1)
701 /* bit shift */ #define GX_BP_RAS1_SS0_S0_SHIFT 0
702
703 /* get value */ #define GX_BP_GET_RAS1_SS0_S0(reg) GX_BITGET((reg), 28, 4)
704 /* set value */ #define GX_BP_SET_RAS1_SS0_S0(reg, x) ((reg) = GX_BITSET((reg), 28, 4, x))
705
706// T0 [24:27] (4) - T-component scale (stage 0)
707 /* start bit */ #define GX_BP_RAS1_SS0_T0_B 24
708 /* end bit */ #define GX_BP_RAS1_SS0_T0_E 27
709 /* bit size */ #define GX_BP_RAS1_SS0_T0_SZ 4
710
711 /* raw mask */ #define GX_BP_RAS1_SS0_T0_MASK (((1 << 4) - 1) << 31 - 27)
712 /* local mask */ #define GX_BP_RAS1_SS0_T0_LMASK ((1 << 4) - 1)
713 /* bit shift */ #define GX_BP_RAS1_SS0_T0_SHIFT 4
714
715 /* get value */ #define GX_BP_GET_RAS1_SS0_T0(reg) GX_BITGET((reg), 24, 4)
716 /* set value */ #define GX_BP_SET_RAS1_SS0_T0(reg, x) ((reg) = GX_BITSET((reg), 24, 4, x))
717
718// S1 [20:23] (4) - S-component scale (stage 1)
719 /* start bit */ #define GX_BP_RAS1_SS0_S1_B 20
720 /* end bit */ #define GX_BP_RAS1_SS0_S1_E 23
721 /* bit size */ #define GX_BP_RAS1_SS0_S1_SZ 4
722
723 /* raw mask */ #define GX_BP_RAS1_SS0_S1_MASK (((1 << 4) - 1) << 31 - 23)
724 /* local mask */ #define GX_BP_RAS1_SS0_S1_LMASK ((1 << 4) - 1)
725 /* bit shift */ #define GX_BP_RAS1_SS0_S1_SHIFT 8
726
727 /* get value */ #define GX_BP_GET_RAS1_SS0_S1(reg) GX_BITGET((reg), 20, 4)
728 /* set value */ #define GX_BP_SET_RAS1_SS0_S1(reg, x) ((reg) = GX_BITSET((reg), 20, 4, x))
729
730// T1 [16:19] (4) - T-component scale (stage 1)
731 /* start bit */ #define GX_BP_RAS1_SS0_T1_B 16
732 /* end bit */ #define GX_BP_RAS1_SS0_T1_E 19
733 /* bit size */ #define GX_BP_RAS1_SS0_T1_SZ 4
734
735 /* raw mask */ #define GX_BP_RAS1_SS0_T1_MASK (((1 << 4) - 1) << 31 - 19)
736 /* local mask */ #define GX_BP_RAS1_SS0_T1_LMASK ((1 << 4) - 1)
737 /* bit shift */ #define GX_BP_RAS1_SS0_T1_SHIFT 12
738
739 /* get value */ #define GX_BP_GET_RAS1_SS0_T1(reg) GX_BITGET((reg), 16, 4)
740 /* set value */ #define GX_BP_SET_RAS1_SS0_T1(reg, x) ((reg) = GX_BITSET((reg), 16, 4, x))
741
742
743/******************************************************************************
744 * BP register 0x26 - ras1_ss1
745 *****************************************************************************/
746// S2 [28:31] (4) - S-component scale (stage 2)
747 /* start bit */ #define GX_BP_RAS1_SS1_S2_B 28
748 /* end bit */ #define GX_BP_RAS1_SS1_S2_E 31
749 /* bit size */ #define GX_BP_RAS1_SS1_S2_SZ 4
750
751 /* raw mask */ #define GX_BP_RAS1_SS1_S2_MASK (((1 << 4) - 1) << 31 - 31)
752 /* local mask */ #define GX_BP_RAS1_SS1_S2_LMASK ((1 << 4) - 1)
753 /* bit shift */ #define GX_BP_RAS1_SS1_S2_SHIFT 0
754
755 /* get value */ #define GX_BP_GET_RAS1_SS1_S2(reg) GX_BITGET((reg), 28, 4)
756 /* set value */ #define GX_BP_SET_RAS1_SS1_S2(reg, x) ((reg) = GX_BITSET((reg), 28, 4, x))
757
758// T2 [24:27] (4) - T-component scale (stage 2)
759 /* start bit */ #define GX_BP_RAS1_SS1_T2_B 24
760 /* end bit */ #define GX_BP_RAS1_SS1_T2_E 27
761 /* bit size */ #define GX_BP_RAS1_SS1_T2_SZ 4
762
763 /* raw mask */ #define GX_BP_RAS1_SS1_T2_MASK (((1 << 4) - 1) << 31 - 27)
764 /* local mask */ #define GX_BP_RAS1_SS1_T2_LMASK ((1 << 4) - 1)
765 /* bit shift */ #define GX_BP_RAS1_SS1_T2_SHIFT 4
766
767 /* get value */ #define GX_BP_GET_RAS1_SS1_T2(reg) GX_BITGET((reg), 24, 4)
768 /* set value */ #define GX_BP_SET_RAS1_SS1_T2(reg, x) ((reg) = GX_BITSET((reg), 24, 4, x))
769
770// S3 [20:23] (4) - S-component scale (stage 3)
771 /* start bit */ #define GX_BP_RAS1_SS1_S3_B 20
772 /* end bit */ #define GX_BP_RAS1_SS1_S3_E 23
773 /* bit size */ #define GX_BP_RAS1_SS1_S3_SZ 4
774
775 /* raw mask */ #define GX_BP_RAS1_SS1_S3_MASK (((1 << 4) - 1) << 31 - 23)
776 /* local mask */ #define GX_BP_RAS1_SS1_S3_LMASK ((1 << 4) - 1)
777 /* bit shift */ #define GX_BP_RAS1_SS1_S3_SHIFT 8
778
779 /* get value */ #define GX_BP_GET_RAS1_SS1_S3(reg) GX_BITGET((reg), 20, 4)
780 /* set value */ #define GX_BP_SET_RAS1_SS1_S3(reg, x) ((reg) = GX_BITSET((reg), 20, 4, x))
781
782// T3 [16:19] (4) - T-component scale (stage 3)
783 /* start bit */ #define GX_BP_RAS1_SS1_T3_B 16
784 /* end bit */ #define GX_BP_RAS1_SS1_T3_E 19
785 /* bit size */ #define GX_BP_RAS1_SS1_T3_SZ 4
786
787 /* raw mask */ #define GX_BP_RAS1_SS1_T3_MASK (((1 << 4) - 1) << 31 - 19)
788 /* local mask */ #define GX_BP_RAS1_SS1_T3_LMASK ((1 << 4) - 1)
789 /* bit shift */ #define GX_BP_RAS1_SS1_T3_SHIFT 12
790
791 /* get value */ #define GX_BP_GET_RAS1_SS1_T3(reg) GX_BITGET((reg), 16, 4)
792 /* set value */ #define GX_BP_SET_RAS1_SS1_T3(reg, x) ((reg) = GX_BITSET((reg), 16, 4, x))
793
794
795/******************************************************************************
796 * BP register 0x27 - ras1_iref
797 *****************************************************************************/
798// MAP0 [29:31] (3) - Texmap id (stage 0)
799 /* start bit */ #define GX_BP_RAS1_IREF_MAP0_B 29
800 /* end bit */ #define GX_BP_RAS1_IREF_MAP0_E 31
801 /* bit size */ #define GX_BP_RAS1_IREF_MAP0_SZ 3
802
803 /* raw mask */ #define GX_BP_RAS1_IREF_MAP0_MASK (((1 << 3) - 1) << 31 - 31)
804 /* local mask */ #define GX_BP_RAS1_IREF_MAP0_LMASK ((1 << 3) - 1)
805 /* bit shift */ #define GX_BP_RAS1_IREF_MAP0_SHIFT 0
806
807 /* get value */ #define GX_BP_GET_RAS1_IREF_MAP0(reg) GX_BITGET((reg), 29, 3)
808 /* set value */ #define GX_BP_SET_RAS1_IREF_MAP0(reg, x) ((reg) = GX_BITSET((reg), 29, 3, x))
809
810// TXC0 [26:28] (3) - Texcoord ID (stage 0)
811 /* start bit */ #define GX_BP_RAS1_IREF_TXC0_B 26
812 /* end bit */ #define GX_BP_RAS1_IREF_TXC0_E 28
813 /* bit size */ #define GX_BP_RAS1_IREF_TXC0_SZ 3
814
815 /* raw mask */ #define GX_BP_RAS1_IREF_TXC0_MASK (((1 << 3) - 1) << 31 - 28)
816 /* local mask */ #define GX_BP_RAS1_IREF_TXC0_LMASK ((1 << 3) - 1)
817 /* bit shift */ #define GX_BP_RAS1_IREF_TXC0_SHIFT 3
818
819 /* get value */ #define GX_BP_GET_RAS1_IREF_TXC0(reg) GX_BITGET((reg), 26, 3)
820 /* set value */ #define GX_BP_SET_RAS1_IREF_TXC0(reg, x) ((reg) = GX_BITSET((reg), 26, 3, x))
821
822// MAP1 [23:25] (3) - Texmap id (stage 1)
823 /* start bit */ #define GX_BP_RAS1_IREF_MAP1_B 23
824 /* end bit */ #define GX_BP_RAS1_IREF_MAP1_E 25
825 /* bit size */ #define GX_BP_RAS1_IREF_MAP1_SZ 3
826
827 /* raw mask */ #define GX_BP_RAS1_IREF_MAP1_MASK (((1 << 3) - 1) << 31 - 25)
828 /* local mask */ #define GX_BP_RAS1_IREF_MAP1_LMASK ((1 << 3) - 1)
829 /* bit shift */ #define GX_BP_RAS1_IREF_MAP1_SHIFT 6
830
831 /* get value */ #define GX_BP_GET_RAS1_IREF_MAP1(reg) GX_BITGET((reg), 23, 3)
832 /* set value */ #define GX_BP_SET_RAS1_IREF_MAP1(reg, x) ((reg) = GX_BITSET((reg), 23, 3, x))
833
834// TXC1 [20:22] (3) - Texcoord ID (stage 1)
835 /* start bit */ #define GX_BP_RAS1_IREF_TXC1_B 20
836 /* end bit */ #define GX_BP_RAS1_IREF_TXC1_E 22
837 /* bit size */ #define GX_BP_RAS1_IREF_TXC1_SZ 3
838
839 /* raw mask */ #define GX_BP_RAS1_IREF_TXC1_MASK (((1 << 3) - 1) << 31 - 22)
840 /* local mask */ #define GX_BP_RAS1_IREF_TXC1_LMASK ((1 << 3) - 1)
841 /* bit shift */ #define GX_BP_RAS1_IREF_TXC1_SHIFT 9
842
843 /* get value */ #define GX_BP_GET_RAS1_IREF_TXC1(reg) GX_BITGET((reg), 20, 3)
844 /* set value */ #define GX_BP_SET_RAS1_IREF_TXC1(reg, x) ((reg) = GX_BITSET((reg), 20, 3, x))
845
846// MAP2 [17:19] (3) - Texmap id (stage 2)
847 /* start bit */ #define GX_BP_RAS1_IREF_MAP2_B 17
848 /* end bit */ #define GX_BP_RAS1_IREF_MAP2_E 19
849 /* bit size */ #define GX_BP_RAS1_IREF_MAP2_SZ 3
850
851 /* raw mask */ #define GX_BP_RAS1_IREF_MAP2_MASK (((1 << 3) - 1) << 31 - 19)
852 /* local mask */ #define GX_BP_RAS1_IREF_MAP2_LMASK ((1 << 3) - 1)
853 /* bit shift */ #define GX_BP_RAS1_IREF_MAP2_SHIFT 12
854
855 /* get value */ #define GX_BP_GET_RAS1_IREF_MAP2(reg) GX_BITGET((reg), 17, 3)
856 /* set value */ #define GX_BP_SET_RAS1_IREF_MAP2(reg, x) ((reg) = GX_BITSET((reg), 17, 3, x))
857
858// TXC2 [14:16] (3) - Texcoord ID (stage 2)
859 /* start bit */ #define GX_BP_RAS1_IREF_TXC2_B 14
860 /* end bit */ #define GX_BP_RAS1_IREF_TXC2_E 16
861 /* bit size */ #define GX_BP_RAS1_IREF_TXC2_SZ 3
862
863 /* raw mask */ #define GX_BP_RAS1_IREF_TXC2_MASK (((1 << 3) - 1) << 31 - 16)
864 /* local mask */ #define GX_BP_RAS1_IREF_TXC2_LMASK ((1 << 3) - 1)
865 /* bit shift */ #define GX_BP_RAS1_IREF_TXC2_SHIFT 15
866
867 /* get value */ #define GX_BP_GET_RAS1_IREF_TXC2(reg) GX_BITGET((reg), 14, 3)
868 /* set value */ #define GX_BP_SET_RAS1_IREF_TXC2(reg, x) ((reg) = GX_BITSET((reg), 14, 3, x))
869
870// MAP3 [11:13] (3) - Texmap id (stage 3)
871 /* start bit */ #define GX_BP_RAS1_IREF_MAP3_B 11
872 /* end bit */ #define GX_BP_RAS1_IREF_MAP3_E 13
873 /* bit size */ #define GX_BP_RAS1_IREF_MAP3_SZ 3
874
875 /* raw mask */ #define GX_BP_RAS1_IREF_MAP3_MASK (((1 << 3) - 1) << 31 - 13)
876 /* local mask */ #define GX_BP_RAS1_IREF_MAP3_LMASK ((1 << 3) - 1)
877 /* bit shift */ #define GX_BP_RAS1_IREF_MAP3_SHIFT 18
878
879 /* get value */ #define GX_BP_GET_RAS1_IREF_MAP3(reg) GX_BITGET((reg), 11, 3)
880 /* set value */ #define GX_BP_SET_RAS1_IREF_MAP3(reg, x) ((reg) = GX_BITSET((reg), 11, 3, x))
881
882// TXC3 [8:10] (3) - Texcoord ID (stage 3)
883 /* start bit */ #define GX_BP_RAS1_IREF_TXC3_B 8
884 /* end bit */ #define GX_BP_RAS1_IREF_TXC3_E 10
885 /* bit size */ #define GX_BP_RAS1_IREF_TXC3_SZ 3
886
887 /* raw mask */ #define GX_BP_RAS1_IREF_TXC3_MASK (((1 << 3) - 1) << 31 - 10)
888 /* local mask */ #define GX_BP_RAS1_IREF_TXC3_LMASK ((1 << 3) - 1)
889 /* bit shift */ #define GX_BP_RAS1_IREF_TXC3_SHIFT 21
890
891 /* get value */ #define GX_BP_GET_RAS1_IREF_TXC3(reg) GX_BITGET((reg), 8, 3)
892 /* set value */ #define GX_BP_SET_RAS1_IREF_TXC3(reg, x) ((reg) = GX_BITSET((reg), 8, 3, x))
893
894
895/******************************************************************************
896 * BP structure - ras1_tref
897 *****************************************************************************/
898// TEXMAP_EVEN [29:31] (3)
899 /* start bit */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_B 29
900 /* end bit */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_E 31
901 /* bit size */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_SZ 3
902
903 /* raw mask */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_MASK (((1 << 3) - 1) << 31 - 31)
904 /* local mask */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_LMASK ((1 << 3) - 1)
905 /* bit shift */ #define GX_BP_RAS1_TREF_TEXMAP_EVEN_SHIFT 0
906
907 /* get value */ #define GX_BP_GET_RAS1_TREF_TEXMAP_EVEN(reg) GX_BITGET((reg), 29, 3)
908 /* set value */ #define GX_BP_SET_RAS1_TREF_TEXMAP_EVEN(reg, x) ((reg) = GX_BITSET((reg), 29, 3, x))
909
910// TEXCOORD_EVEN [26:28] (3)
911 /* start bit */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_B 26
912 /* end bit */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_E 28
913 /* bit size */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_SZ 3
914
915 /* raw mask */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_MASK (((1 << 3) - 1) << 31 - 28)
916 /* local mask */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_LMASK ((1 << 3) - 1)
917 /* bit shift */ #define GX_BP_RAS1_TREF_TEXCOORD_EVEN_SHIFT 3
918
919 /* get value */ #define GX_BP_GET_RAS1_TREF_TEXCOORD_EVEN(reg) GX_BITGET((reg), 26, 3)
920 /* set value */ #define GX_BP_SET_RAS1_TREF_TEXCOORD_EVEN(reg, x) ((reg) = GX_BITSET((reg), 26, 3, x))
921
922// ENABLE_TEX_EVEN [25:25] (1)
923 /* start bit */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_B 25
924 /* end bit */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_E 25
925 /* bit size */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_SZ 1
926
927 /* raw mask */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_MASK (((1 << 1) - 1) << 31 - 25)
928 /* local mask */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_LMASK ((1 << 1) - 1)
929 /* bit shift */ #define GX_BP_RAS1_TREF_ENABLE_TEX_EVEN_SHIFT 6
930
931 /* get value */ #define GX_BP_GET_RAS1_TREF_ENABLE_TEX_EVEN(reg) GX_BITGET((reg), 25, 1)
932 /* set value */ #define GX_BP_SET_RAS1_TREF_ENABLE_TEX_EVEN(reg, x) ((reg) = GX_BITSET((reg), 25, 1, x))
933
934// COLORCHAN_EVEN [22:24] (3)
935 /* start bit */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_B 22
936 /* end bit */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_E 24
937 /* bit size */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_SZ 3
938
939 /* raw mask */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_MASK (((1 << 3) - 1) << 31 - 24)
940 /* local mask */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_LMASK ((1 << 3) - 1)
941 /* bit shift */ #define GX_BP_RAS1_TREF_COLORCHAN_EVEN_SHIFT 7
942
943 /* get value */ #define GX_BP_GET_RAS1_TREF_COLORCHAN_EVEN(reg) GX_BITGET((reg), 22, 3)
944 /* set value */ #define GX_BP_SET_RAS1_TREF_COLORCHAN_EVEN(reg, x) ((reg) = GX_BITSET((reg), 22, 3, x))
945
946// TEXMAP_ODD [17:19] (3)
947 /* start bit */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_B 17
948 /* end bit */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_E 19
949 /* bit size */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_SZ 3
950
951 /* raw mask */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_MASK (((1 << 3) - 1) << 31 - 19)
952 /* local mask */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_LMASK ((1 << 3) - 1)
953 /* bit shift */ #define GX_BP_RAS1_TREF_TEXMAP_ODD_SHIFT 12
954
955 /* get value */ #define GX_BP_GET_RAS1_TREF_TEXMAP_ODD(reg) GX_BITGET((reg), 17, 3)
956 /* set value */ #define GX_BP_SET_RAS1_TREF_TEXMAP_ODD(reg, x) ((reg) = GX_BITSET((reg), 17, 3, x))
957
958// TEXCOORD_ODD [14:16] (3)
959 /* start bit */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_B 14
960 /* end bit */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_E 16
961 /* bit size */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_SZ 3
962
963 /* raw mask */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_MASK (((1 << 3) - 1) << 31 - 16)
964 /* local mask */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_LMASK ((1 << 3) - 1)
965 /* bit shift */ #define GX_BP_RAS1_TREF_TEXCOORD_ODD_SHIFT 15
966
967 /* get value */ #define GX_BP_GET_RAS1_TREF_TEXCOORD_ODD(reg) GX_BITGET((reg), 14, 3)
968 /* set value */ #define GX_BP_SET_RAS1_TREF_TEXCOORD_ODD(reg, x) ((reg) = GX_BITSET((reg), 14, 3, x))
969
970// ENABLE_TEX_ODD [13:13] (1)
971 /* start bit */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_B 13
972 /* end bit */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_E 13
973 /* bit size */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_SZ 1
974
975 /* raw mask */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_MASK (((1 << 1) - 1) << 31 - 13)
976 /* local mask */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_LMASK ((1 << 1) - 1)
977 /* bit shift */ #define GX_BP_RAS1_TREF_ENABLE_TEX_ODD_SHIFT 18
978
979 /* get value */ #define GX_BP_GET_RAS1_TREF_ENABLE_TEX_ODD(reg) GX_BITGET((reg), 13, 1)
980 /* set value */ #define GX_BP_SET_RAS1_TREF_ENABLE_TEX_ODD(reg, x) ((reg) = GX_BITSET((reg), 13, 1, x))
981
982// COLORCHAN_ODD [10:12] (3)
983 /* start bit */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_B 10
984 /* end bit */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_E 12
985 /* bit size */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_SZ 3
986
987 /* raw mask */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_MASK (((1 << 3) - 1) << 31 - 12)
988 /* local mask */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_LMASK ((1 << 3) - 1)
989 /* bit shift */ #define GX_BP_RAS1_TREF_COLORCHAN_ODD_SHIFT 19
990
991 /* get value */ #define GX_BP_GET_RAS1_TREF_COLORCHAN_ODD(reg) GX_BITGET((reg), 10, 3)
992 /* set value */ #define GX_BP_SET_RAS1_TREF_COLORCHAN_ODD(reg, x) ((reg) = GX_BITSET((reg), 10, 3, x))
993
994
995/******************************************************************************
996 * BP structure - su_size
997 *****************************************************************************/
998// SCALE [16:31] (16)
999 /* start bit */ #define GX_BP_SU_SIZE_SCALE_B 16
1000 /* end bit */ #define GX_BP_SU_SIZE_SCALE_E 31
1001 /* bit size */ #define GX_BP_SU_SIZE_SCALE_SZ 16
1002
1003 /* raw mask */ #define GX_BP_SU_SIZE_SCALE_MASK (((1 << 16) - 1) << 31 - 31)
1004 /* local mask */ #define GX_BP_SU_SIZE_SCALE_LMASK ((1 << 16) - 1)
1005 /* bit shift */ #define GX_BP_SU_SIZE_SCALE_SHIFT 0
1006
1007 /* get value */ #define GX_BP_GET_SU_SIZE_SCALE(reg) GX_BITGET((reg), 16, 16)
1008 /* set value */ #define GX_BP_SET_SU_SIZE_SCALE(reg, x) ((reg) = GX_BITSET((reg), 16, 16, x))
1009
1010// RANGEBIAS [15:15] (1)
1011 /* start bit */ #define GX_BP_SU_SIZE_RANGEBIAS_B 15
1012 /* end bit */ #define GX_BP_SU_SIZE_RANGEBIAS_E 15
1013 /* bit size */ #define GX_BP_SU_SIZE_RANGEBIAS_SZ 1
1014
1015 /* raw mask */ #define GX_BP_SU_SIZE_RANGEBIAS_MASK (((1 << 1) - 1) << 31 - 15)
1016 /* local mask */ #define GX_BP_SU_SIZE_RANGEBIAS_LMASK ((1 << 1) - 1)
1017 /* bit shift */ #define GX_BP_SU_SIZE_RANGEBIAS_SHIFT 16
1018
1019 /* get value */ #define GX_BP_GET_SU_SIZE_RANGEBIAS(reg) GX_BITGET((reg), 15, 1)
1020 /* set value */ #define GX_BP_SET_SU_SIZE_RANGEBIAS(reg, x) ((reg) = GX_BITSET((reg), 15, 1, x))
1021
1022// CYLINDRICWRAP [14:14] (1)
1023 /* start bit */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_B 14
1024 /* end bit */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_E 14
1025 /* bit size */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_SZ 1
1026
1027 /* raw mask */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_MASK (((1 << 1) - 1) << 31 - 14)
1028 /* local mask */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_LMASK ((1 << 1) - 1)
1029 /* bit shift */ #define GX_BP_SU_SIZE_CYLINDRICWRAP_SHIFT 17
1030
1031 /* get value */ #define GX_BP_GET_SU_SIZE_CYLINDRICWRAP(reg) GX_BITGET((reg), 14, 1)
1032 /* set value */ #define GX_BP_SET_SU_SIZE_CYLINDRICWRAP(reg, x) ((reg) = GX_BITSET((reg), 14, 1, x))
1033
1034// USELINEOFS [13:13] (1)
1035 /* start bit */ #define GX_BP_SU_SIZE_USELINEOFS_B 13
1036 /* end bit */ #define GX_BP_SU_SIZE_USELINEOFS_E 13
1037 /* bit size */ #define GX_BP_SU_SIZE_USELINEOFS_SZ 1
1038
1039 /* raw mask */ #define GX_BP_SU_SIZE_USELINEOFS_MASK (((1 << 1) - 1) << 31 - 13)
1040 /* local mask */ #define GX_BP_SU_SIZE_USELINEOFS_LMASK ((1 << 1) - 1)
1041 /* bit shift */ #define GX_BP_SU_SIZE_USELINEOFS_SHIFT 18
1042
1043 /* get value */ #define GX_BP_GET_SU_SIZE_USELINEOFS(reg) GX_BITGET((reg), 13, 1)
1044 /* set value */ #define GX_BP_SET_SU_SIZE_USELINEOFS(reg, x) ((reg) = GX_BITSET((reg), 13, 1, x))
1045
1046// USEPOINTOFS [12:12] (1)
1047 /* start bit */ #define GX_BP_SU_SIZE_USEPOINTOFS_B 12
1048 /* end bit */ #define GX_BP_SU_SIZE_USEPOINTOFS_E 12
1049 /* bit size */ #define GX_BP_SU_SIZE_USEPOINTOFS_SZ 1
1050
1051 /* raw mask */ #define GX_BP_SU_SIZE_USEPOINTOFS_MASK (((1 << 1) - 1) << 31 - 12)
1052 /* local mask */ #define GX_BP_SU_SIZE_USEPOINTOFS_LMASK ((1 << 1) - 1)
1053 /* bit shift */ #define GX_BP_SU_SIZE_USEPOINTOFS_SHIFT 19
1054
1055 /* get value */ #define GX_BP_GET_SU_SIZE_USEPOINTOFS(reg) GX_BITGET((reg), 12, 1)
1056 /* set value */ #define GX_BP_SET_SU_SIZE_USEPOINTOFS(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
1057
1058
1059/******************************************************************************
1060 * BP register 0x40 - ZMode
1061 *****************************************************************************/
1062// TEST_ENABLE [31:31] (1)
1063 /* start bit */ #define GX_BP_ZMODE_TEST_ENABLE_B 31
1064 /* end bit */ #define GX_BP_ZMODE_TEST_ENABLE_E 31
1065 /* bit size */ #define GX_BP_ZMODE_TEST_ENABLE_SZ 1
1066
1067 /* raw mask */ #define GX_BP_ZMODE_TEST_ENABLE_MASK (((1 << 1) - 1) << 31 - 31)
1068 /* local mask */ #define GX_BP_ZMODE_TEST_ENABLE_LMASK ((1 << 1) - 1)
1069 /* bit shift */ #define GX_BP_ZMODE_TEST_ENABLE_SHIFT 0
1070
1071 /* get value */ #define GX_BP_GET_ZMODE_TEST_ENABLE(reg) GX_BITGET((reg), 31, 1)
1072 /* set value */ #define GX_BP_SET_ZMODE_TEST_ENABLE(reg, x) ((reg) = GX_BITSET((reg), 31, 1, x))
1073
1074// COMPARE [28:30] (3)
1075 /* start bit */ #define GX_BP_ZMODE_COMPARE_B 28
1076 /* end bit */ #define GX_BP_ZMODE_COMPARE_E 30
1077 /* bit size */ #define GX_BP_ZMODE_COMPARE_SZ 3
1078
1079 /* raw mask */ #define GX_BP_ZMODE_COMPARE_MASK (((1 << 3) - 1) << 31 - 30)
1080 /* local mask */ #define GX_BP_ZMODE_COMPARE_LMASK ((1 << 3) - 1)
1081 /* bit shift */ #define GX_BP_ZMODE_COMPARE_SHIFT 1
1082
1083 /* get value */ #define GX_BP_GET_ZMODE_COMPARE(reg) GX_BITGET((reg), 28, 3)
1084 /* set value */ #define GX_BP_SET_ZMODE_COMPARE(reg, x) ((reg) = GX_BITSET((reg), 28, 3, x))
1085
1086// UPDATE_ENABLE [27:27] (1)
1087 /* start bit */ #define GX_BP_ZMODE_UPDATE_ENABLE_B 27
1088 /* end bit */ #define GX_BP_ZMODE_UPDATE_ENABLE_E 27
1089 /* bit size */ #define GX_BP_ZMODE_UPDATE_ENABLE_SZ 1
1090
1091 /* raw mask */ #define GX_BP_ZMODE_UPDATE_ENABLE_MASK (((1 << 1) - 1) << 31 - 27)
1092 /* local mask */ #define GX_BP_ZMODE_UPDATE_ENABLE_LMASK ((1 << 1) - 1)
1093 /* bit shift */ #define GX_BP_ZMODE_UPDATE_ENABLE_SHIFT 4
1094
1095 /* get value */ #define GX_BP_GET_ZMODE_UPDATE_ENABLE(reg) GX_BITGET((reg), 27, 1)
1096 /* set value */ #define GX_BP_SET_ZMODE_UPDATE_ENABLE(reg, x) ((reg) = GX_BITSET((reg), 27, 1, x))
1097
1098
1099/******************************************************************************
1100 * BP register 0x41 - BlendMode
1101 *****************************************************************************/
1102// BLEND_ENABLE [31:31] (1)
1103 /* start bit */ #define GX_BP_BLENDMODE_BLEND_ENABLE_B 31
1104 /* end bit */ #define GX_BP_BLENDMODE_BLEND_ENABLE_E 31
1105 /* bit size */ #define GX_BP_BLENDMODE_BLEND_ENABLE_SZ 1
1106
1107 /* raw mask */ #define GX_BP_BLENDMODE_BLEND_ENABLE_MASK (((1 << 1) - 1) << 31 - 31)
1108 /* local mask */ #define GX_BP_BLENDMODE_BLEND_ENABLE_LMASK ((1 << 1) - 1)
1109 /* bit shift */ #define GX_BP_BLENDMODE_BLEND_ENABLE_SHIFT 0
1110
1111 /* get value */ #define GX_BP_GET_BLENDMODE_BLEND_ENABLE(reg) GX_BITGET((reg), 31, 1)
1112 /* set value */ #define GX_BP_SET_BLENDMODE_BLEND_ENABLE(reg, x) ((reg) = GX_BITSET((reg), 31, 1, x))
1113
1114// LOGIC_OP_ENABLE [30:30] (1)
1115 /* start bit */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_B 30
1116 /* end bit */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_E 30
1117 /* bit size */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_SZ 1
1118
1119 /* raw mask */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_MASK (((1 << 1) - 1) << 31 - 30)
1120 /* local mask */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_LMASK ((1 << 1) - 1)
1121 /* bit shift */ #define GX_BP_BLENDMODE_LOGIC_OP_ENABLE_SHIFT 1
1122
1123 /* get value */ #define GX_BP_GET_BLENDMODE_LOGIC_OP_ENABLE(reg) GX_BITGET((reg), 30, 1)
1124 /* set value */ #define GX_BP_SET_BLENDMODE_LOGIC_OP_ENABLE(reg, x) ((reg) = GX_BITSET((reg), 30, 1, x))
1125
1126// DITHER [29:29] (1)
1127 /* start bit */ #define GX_BP_BLENDMODE_DITHER_B 29
1128 /* end bit */ #define GX_BP_BLENDMODE_DITHER_E 29
1129 /* bit size */ #define GX_BP_BLENDMODE_DITHER_SZ 1
1130
1131 /* raw mask */ #define GX_BP_BLENDMODE_DITHER_MASK (((1 << 1) - 1) << 31 - 29)
1132 /* local mask */ #define GX_BP_BLENDMODE_DITHER_LMASK ((1 << 1) - 1)
1133 /* bit shift */ #define GX_BP_BLENDMODE_DITHER_SHIFT 2
1134
1135 /* get value */ #define GX_BP_GET_BLENDMODE_DITHER(reg) GX_BITGET((reg), 29, 1)
1136 /* set value */ #define GX_BP_SET_BLENDMODE_DITHER(reg, x) ((reg) = GX_BITSET((reg), 29, 1, x))
1137
1138// COLOR_UPDATE [28:28] (1)
1139 /* start bit */ #define GX_BP_BLENDMODE_COLOR_UPDATE_B 28
1140 /* end bit */ #define GX_BP_BLENDMODE_COLOR_UPDATE_E 28
1141 /* bit size */ #define GX_BP_BLENDMODE_COLOR_UPDATE_SZ 1
1142
1143 /* raw mask */ #define GX_BP_BLENDMODE_COLOR_UPDATE_MASK (((1 << 1) - 1) << 31 - 28)
1144 /* local mask */ #define GX_BP_BLENDMODE_COLOR_UPDATE_LMASK ((1 << 1) - 1)
1145 /* bit shift */ #define GX_BP_BLENDMODE_COLOR_UPDATE_SHIFT 3
1146
1147 /* get value */ #define GX_BP_GET_BLENDMODE_COLOR_UPDATE(reg) GX_BITGET((reg), 28, 1)
1148 /* set value */ #define GX_BP_SET_BLENDMODE_COLOR_UPDATE(reg, x) ((reg) = GX_BITSET((reg), 28, 1, x))
1149
1150// ALPHA_UPDATE [27:27] (1)
1151 /* start bit */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_B 27
1152 /* end bit */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_E 27
1153 /* bit size */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_SZ 1
1154
1155 /* raw mask */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_MASK (((1 << 1) - 1) << 31 - 27)
1156 /* local mask */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_LMASK ((1 << 1) - 1)
1157 /* bit shift */ #define GX_BP_BLENDMODE_ALPHA_UPDATE_SHIFT 4
1158
1159 /* get value */ #define GX_BP_GET_BLENDMODE_ALPHA_UPDATE(reg) GX_BITGET((reg), 27, 1)
1160 /* set value */ #define GX_BP_SET_BLENDMODE_ALPHA_UPDATE(reg, x) ((reg) = GX_BITSET((reg), 27, 1, x))
1161
1162// DST_FACTOR [24:26] (3)
1163 /* start bit */ #define GX_BP_BLENDMODE_DST_FACTOR_B 24
1164 /* end bit */ #define GX_BP_BLENDMODE_DST_FACTOR_E 26
1165 /* bit size */ #define GX_BP_BLENDMODE_DST_FACTOR_SZ 3
1166
1167 /* raw mask */ #define GX_BP_BLENDMODE_DST_FACTOR_MASK (((1 << 3) - 1) << 31 - 26)
1168 /* local mask */ #define GX_BP_BLENDMODE_DST_FACTOR_LMASK ((1 << 3) - 1)
1169 /* bit shift */ #define GX_BP_BLENDMODE_DST_FACTOR_SHIFT 5
1170
1171 /* get value */ #define GX_BP_GET_BLENDMODE_DST_FACTOR(reg) GX_BITGET((reg), 24, 3)
1172 /* set value */ #define GX_BP_SET_BLENDMODE_DST_FACTOR(reg, x) ((reg) = GX_BITSET((reg), 24, 3, x))
1173
1174// SRC_FACTOR [21:23] (3)
1175 /* start bit */ #define GX_BP_BLENDMODE_SRC_FACTOR_B 21
1176 /* end bit */ #define GX_BP_BLENDMODE_SRC_FACTOR_E 23
1177 /* bit size */ #define GX_BP_BLENDMODE_SRC_FACTOR_SZ 3
1178
1179 /* raw mask */ #define GX_BP_BLENDMODE_SRC_FACTOR_MASK (((1 << 3) - 1) << 31 - 23)
1180 /* local mask */ #define GX_BP_BLENDMODE_SRC_FACTOR_LMASK ((1 << 3) - 1)
1181 /* bit shift */ #define GX_BP_BLENDMODE_SRC_FACTOR_SHIFT 8
1182
1183 /* get value */ #define GX_BP_GET_BLENDMODE_SRC_FACTOR(reg) GX_BITGET((reg), 21, 3)
1184 /* set value */ #define GX_BP_SET_BLENDMODE_SRC_FACTOR(reg, x) ((reg) = GX_BITSET((reg), 21, 3, x))
1185
1186// SUBTRACT [20:20] (1)
1187 /* start bit */ #define GX_BP_BLENDMODE_SUBTRACT_B 20
1188 /* end bit */ #define GX_BP_BLENDMODE_SUBTRACT_E 20
1189 /* bit size */ #define GX_BP_BLENDMODE_SUBTRACT_SZ 1
1190
1191 /* raw mask */ #define GX_BP_BLENDMODE_SUBTRACT_MASK (((1 << 1) - 1) << 31 - 20)
1192 /* local mask */ #define GX_BP_BLENDMODE_SUBTRACT_LMASK ((1 << 1) - 1)
1193 /* bit shift */ #define GX_BP_BLENDMODE_SUBTRACT_SHIFT 11
1194
1195 /* get value */ #define GX_BP_GET_BLENDMODE_SUBTRACT(reg) GX_BITGET((reg), 20, 1)
1196 /* set value */ #define GX_BP_SET_BLENDMODE_SUBTRACT(reg, x) ((reg) = GX_BITSET((reg), 20, 1, x))
1197
1198// LOGIC_MODE [16:19] (4)
1199 /* start bit */ #define GX_BP_BLENDMODE_LOGIC_MODE_B 16
1200 /* end bit */ #define GX_BP_BLENDMODE_LOGIC_MODE_E 19
1201 /* bit size */ #define GX_BP_BLENDMODE_LOGIC_MODE_SZ 4
1202
1203 /* raw mask */ #define GX_BP_BLENDMODE_LOGIC_MODE_MASK (((1 << 4) - 1) << 31 - 19)
1204 /* local mask */ #define GX_BP_BLENDMODE_LOGIC_MODE_LMASK ((1 << 4) - 1)
1205 /* bit shift */ #define GX_BP_BLENDMODE_LOGIC_MODE_SHIFT 12
1206
1207 /* get value */ #define GX_BP_GET_BLENDMODE_LOGIC_MODE(reg) GX_BITGET((reg), 16, 4)
1208 /* set value */ #define GX_BP_SET_BLENDMODE_LOGIC_MODE(reg, x) ((reg) = GX_BITSET((reg), 16, 4, x))
1209
1210
1211/******************************************************************************
1212 * BP register 0x42 - DstAlpha
1213 *****************************************************************************/
1214// ALPHA [24:31] (8)
1215 /* start bit */ #define GX_BP_DSTALPHA_ALPHA_B 24
1216 /* end bit */ #define GX_BP_DSTALPHA_ALPHA_E 31
1217 /* bit size */ #define GX_BP_DSTALPHA_ALPHA_SZ 8
1218
1219 /* raw mask */ #define GX_BP_DSTALPHA_ALPHA_MASK (((1 << 8) - 1) << 31 - 31)
1220 /* local mask */ #define GX_BP_DSTALPHA_ALPHA_LMASK ((1 << 8) - 1)
1221 /* bit shift */ #define GX_BP_DSTALPHA_ALPHA_SHIFT 0
1222
1223 /* get value */ #define GX_BP_GET_DSTALPHA_ALPHA(reg) GX_BITGET((reg), 24, 8)
1224 /* set value */ #define GX_BP_SET_DSTALPHA_ALPHA(reg, x) ((reg) = GX_BITSET((reg), 24, 8, x))
1225
1226// ENABLE [23:23] (1)
1227 /* start bit */ #define GX_BP_DSTALPHA_ENABLE_B 23
1228 /* end bit */ #define GX_BP_DSTALPHA_ENABLE_E 23
1229 /* bit size */ #define GX_BP_DSTALPHA_ENABLE_SZ 1
1230
1231 /* raw mask */ #define GX_BP_DSTALPHA_ENABLE_MASK (((1 << 1) - 1) << 31 - 23)
1232 /* local mask */ #define GX_BP_DSTALPHA_ENABLE_LMASK ((1 << 1) - 1)
1233 /* bit shift */ #define GX_BP_DSTALPHA_ENABLE_SHIFT 8
1234
1235 /* get value */ #define GX_BP_GET_DSTALPHA_ENABLE(reg) GX_BITGET((reg), 23, 1)
1236 /* set value */ #define GX_BP_SET_DSTALPHA_ENABLE(reg, x) ((reg) = GX_BITSET((reg), 23, 1, x))
1237
1238// YUV_FMT [21:22] (2)
1239 /* start bit */ #define GX_BP_DSTALPHA_YUV_FMT_B 21
1240 /* end bit */ #define GX_BP_DSTALPHA_YUV_FMT_E 22
1241 /* bit size */ #define GX_BP_DSTALPHA_YUV_FMT_SZ 2
1242
1243 /* raw mask */ #define GX_BP_DSTALPHA_YUV_FMT_MASK (((1 << 2) - 1) << 31 - 22)
1244 /* local mask */ #define GX_BP_DSTALPHA_YUV_FMT_LMASK ((1 << 2) - 1)
1245 /* bit shift */ #define GX_BP_DSTALPHA_YUV_FMT_SHIFT 9
1246
1247 /* get value */ #define GX_BP_GET_DSTALPHA_YUV_FMT(reg) GX_BITGET((reg), 21, 2)
1248 /* set value */ #define GX_BP_SET_DSTALPHA_YUV_FMT(reg, x) ((reg) = GX_BITSET((reg), 21, 2, x))
1249
1250
1251/******************************************************************************
1252 * BP register 0x43 - ZControl
1253 *****************************************************************************/
1254// PIXEL_FMT [29:31] (3)
1255 /* start bit */ #define GX_BP_ZCONTROL_PIXEL_FMT_B 29
1256 /* end bit */ #define GX_BP_ZCONTROL_PIXEL_FMT_E 31
1257 /* bit size */ #define GX_BP_ZCONTROL_PIXEL_FMT_SZ 3
1258
1259 /* raw mask */ #define GX_BP_ZCONTROL_PIXEL_FMT_MASK (((1 << 3) - 1) << 31 - 31)
1260 /* local mask */ #define GX_BP_ZCONTROL_PIXEL_FMT_LMASK ((1 << 3) - 1)
1261 /* bit shift */ #define GX_BP_ZCONTROL_PIXEL_FMT_SHIFT 0
1262
1263 /* get value */ #define GX_BP_GET_ZCONTROL_PIXEL_FMT(reg) GX_BITGET((reg), 29, 3)
1264 /* set value */ #define GX_BP_SET_ZCONTROL_PIXEL_FMT(reg, x) ((reg) = GX_BITSET((reg), 29, 3, x))
1265
1266// Z_FMT [26:28] (3)
1267 /* start bit */ #define GX_BP_ZCONTROL_Z_FMT_B 26
1268 /* end bit */ #define GX_BP_ZCONTROL_Z_FMT_E 28
1269 /* bit size */ #define GX_BP_ZCONTROL_Z_FMT_SZ 3
1270
1271 /* raw mask */ #define GX_BP_ZCONTROL_Z_FMT_MASK (((1 << 3) - 1) << 31 - 28)
1272 /* local mask */ #define GX_BP_ZCONTROL_Z_FMT_LMASK ((1 << 3) - 1)
1273 /* bit shift */ #define GX_BP_ZCONTROL_Z_FMT_SHIFT 3
1274
1275 /* get value */ #define GX_BP_GET_ZCONTROL_Z_FMT(reg) GX_BITGET((reg), 26, 3)
1276 /* set value */ #define GX_BP_SET_ZCONTROL_Z_FMT(reg, x) ((reg) = GX_BITSET((reg), 26, 3, x))
1277
1278// BEFORE_TEX [25:25] (1) - Determines whether Z-buffering occurs before or after texturing
1279 /* start bit */ #define GX_BP_ZCONTROL_BEFORE_TEX_B 25
1280 /* end bit */ #define GX_BP_ZCONTROL_BEFORE_TEX_E 25
1281 /* bit size */ #define GX_BP_ZCONTROL_BEFORE_TEX_SZ 1
1282
1283 /* raw mask */ #define GX_BP_ZCONTROL_BEFORE_TEX_MASK (((1 << 1) - 1) << 31 - 25)
1284 /* local mask */ #define GX_BP_ZCONTROL_BEFORE_TEX_LMASK ((1 << 1) - 1)
1285 /* bit shift */ #define GX_BP_ZCONTROL_BEFORE_TEX_SHIFT 6
1286
1287 /* get value */ #define GX_BP_GET_ZCONTROL_BEFORE_TEX(reg) GX_BITGET((reg), 25, 1)
1288 /* set value */ #define GX_BP_SET_ZCONTROL_BEFORE_TEX(reg, x) ((reg) = GX_BITSET((reg), 25, 1, x))
1289
1290
1291/******************************************************************************
1292 * BP register 0x44 - FieldMask
1293 *****************************************************************************/
1294// ODD [31:31] (1) - Whether to write odd fields to the EFB
1295 /* start bit */ #define GX_BP_FIELDMASK_ODD_B 31
1296 /* end bit */ #define GX_BP_FIELDMASK_ODD_E 31
1297 /* bit size */ #define GX_BP_FIELDMASK_ODD_SZ 1
1298
1299 /* raw mask */ #define GX_BP_FIELDMASK_ODD_MASK (((1 << 1) - 1) << 31 - 31)
1300 /* local mask */ #define GX_BP_FIELDMASK_ODD_LMASK ((1 << 1) - 1)
1301 /* bit shift */ #define GX_BP_FIELDMASK_ODD_SHIFT 0
1302
1303 /* get value */ #define GX_BP_GET_FIELDMASK_ODD(reg) GX_BITGET((reg), 31, 1)
1304 /* set value */ #define GX_BP_SET_FIELDMASK_ODD(reg, x) ((reg) = GX_BITSET((reg), 31, 1, x))
1305
1306// EVEN [30:30] (1) - Whether to write even fields to the EFB
1307 /* start bit */ #define GX_BP_FIELDMASK_EVEN_B 30
1308 /* end bit */ #define GX_BP_FIELDMASK_EVEN_E 30
1309 /* bit size */ #define GX_BP_FIELDMASK_EVEN_SZ 1
1310
1311 /* raw mask */ #define GX_BP_FIELDMASK_EVEN_MASK (((1 << 1) - 1) << 31 - 30)
1312 /* local mask */ #define GX_BP_FIELDMASK_EVEN_LMASK ((1 << 1) - 1)
1313 /* bit shift */ #define GX_BP_FIELDMASK_EVEN_SHIFT 1
1314
1315 /* get value */ #define GX_BP_GET_FIELDMASK_EVEN(reg) GX_BITGET((reg), 30, 1)
1316 /* set value */ #define GX_BP_SET_FIELDMASK_EVEN(reg, x) ((reg) = GX_BITSET((reg), 30, 1, x))
1317
1318
1319/******************************************************************************
1320 * BP register 0x59 - ScissorOffset
1321 *****************************************************************************/
1322// OX [22:31] (10)
1323 /* start bit */ #define GX_BP_SCISSOROFFSET_OX_B 22
1324 /* end bit */ #define GX_BP_SCISSOROFFSET_OX_E 31
1325 /* bit size */ #define GX_BP_SCISSOROFFSET_OX_SZ 10
1326
1327 /* raw mask */ #define GX_BP_SCISSOROFFSET_OX_MASK (((1 << 10) - 1) << 31 - 31)
1328 /* local mask */ #define GX_BP_SCISSOROFFSET_OX_LMASK ((1 << 10) - 1)
1329 /* bit shift */ #define GX_BP_SCISSOROFFSET_OX_SHIFT 0
1330
1331 /* get value */ #define GX_BP_GET_SCISSOROFFSET_OX(reg) GX_BITGET((reg), 22, 10)
1332 /* set value */ #define GX_BP_SET_SCISSOROFFSET_OX(reg, x) ((reg) = GX_BITSET((reg), 22, 10, x))
1333
1334// OY [12:21] (10)
1335 /* start bit */ #define GX_BP_SCISSOROFFSET_OY_B 12
1336 /* end bit */ #define GX_BP_SCISSOROFFSET_OY_E 21
1337 /* bit size */ #define GX_BP_SCISSOROFFSET_OY_SZ 10
1338
1339 /* raw mask */ #define GX_BP_SCISSOROFFSET_OY_MASK (((1 << 10) - 1) << 31 - 21)
1340 /* local mask */ #define GX_BP_SCISSOROFFSET_OY_LMASK ((1 << 10) - 1)
1341 /* bit shift */ #define GX_BP_SCISSOROFFSET_OY_SHIFT 10
1342
1343 /* get value */ #define GX_BP_GET_SCISSOROFFSET_OY(reg) GX_BITGET((reg), 12, 10)
1344 /* set value */ #define GX_BP_SET_SCISSOROFFSET_OY(reg, x) ((reg) = GX_BITSET((reg), 12, 10, x))
1345
1346
1347/******************************************************************************
1348 * BP register 0x68 - FieldMode
1349 *****************************************************************************/
1350// TEX_LOD [31:31] (1) - Adjust vertex tex LOD computation to account for interlacing
1351 /* start bit */ #define GX_BP_FIELDMODE_TEX_LOD_B 31
1352 /* end bit */ #define GX_BP_FIELDMODE_TEX_LOD_E 31
1353 /* bit size */ #define GX_BP_FIELDMODE_TEX_LOD_SZ 1
1354
1355 /* raw mask */ #define GX_BP_FIELDMODE_TEX_LOD_MASK (((1 << 1) - 1) << 31 - 31)
1356 /* local mask */ #define GX_BP_FIELDMODE_TEX_LOD_LMASK ((1 << 1) - 1)
1357 /* bit shift */ #define GX_BP_FIELDMODE_TEX_LOD_SHIFT 0
1358
1359 /* get value */ #define GX_BP_GET_FIELDMODE_TEX_LOD(reg) GX_BITGET((reg), 31, 1)
1360 /* set value */ #define GX_BP_SET_FIELDMODE_TEX_LOD(reg, x) ((reg) = GX_BITSET((reg), 31, 1, x))
1361
1362
1363/******************************************************************************
1364 * BP structure - TevColorCombiner
1365 *****************************************************************************/
1366// D [28:31] (4)
1367 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_D_B 28
1368 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_D_E 31
1369 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_D_SZ 4
1370
1371 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_D_MASK (((1 << 4) - 1) << 31 - 31)
1372 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_D_LMASK ((1 << 4) - 1)
1373 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_D_SHIFT 0
1374
1375 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_D(reg) GX_BITGET((reg), 28, 4)
1376 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_D(reg, x) ((reg) = GX_BITSET((reg), 28, 4, x))
1377
1378// C [24:27] (4)
1379 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_C_B 24
1380 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_C_E 27
1381 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_C_SZ 4
1382
1383 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_C_MASK (((1 << 4) - 1) << 31 - 27)
1384 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_C_LMASK ((1 << 4) - 1)
1385 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_C_SHIFT 4
1386
1387 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_C(reg) GX_BITGET((reg), 24, 4)
1388 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_C(reg, x) ((reg) = GX_BITSET((reg), 24, 4, x))
1389
1390// B [20:23] (4)
1391 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_B_B 20
1392 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_B_E 23
1393 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_B_SZ 4
1394
1395 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_B_MASK (((1 << 4) - 1) << 31 - 23)
1396 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_B_LMASK ((1 << 4) - 1)
1397 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_B_SHIFT 8
1398
1399 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_B(reg) GX_BITGET((reg), 20, 4)
1400 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_B(reg, x) ((reg) = GX_BITSET((reg), 20, 4, x))
1401
1402// A [16:19] (4)
1403 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_A_B 16
1404 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_A_E 19
1405 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_A_SZ 4
1406
1407 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_A_MASK (((1 << 4) - 1) << 31 - 19)
1408 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_A_LMASK ((1 << 4) - 1)
1409 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_A_SHIFT 12
1410
1411 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_A(reg) GX_BITGET((reg), 16, 4)
1412 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_A(reg, x) ((reg) = GX_BITSET((reg), 16, 4, x))
1413
1414// BIAS [14:15] (2)
1415 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_BIAS_B 14
1416 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_BIAS_E 15
1417 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_BIAS_SZ 2
1418
1419 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_BIAS_MASK (((1 << 2) - 1) << 31 - 15)
1420 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_BIAS_LMASK ((1 << 2) - 1)
1421 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_BIAS_SHIFT 16
1422
1423 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_BIAS(reg) GX_BITGET((reg), 14, 2)
1424 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_BIAS(reg, x) ((reg) = GX_BITSET((reg), 14, 2, x))
1425
1426// OP_OR_COMPARISON [13:13] (1)
1427 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_B 13
1428 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_E 13
1429 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_SZ 1
1430
1431 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_MASK (((1 << 1) - 1) << 31 - 13)
1432 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_LMASK ((1 << 1) - 1)
1433 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_OP_OR_COMPARISON_SHIFT 18
1434
1435 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_OP_OR_COMPARISON(reg) GX_BITGET((reg), 13, 1)
1436 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_OP_OR_COMPARISON(reg, x) ((reg) = GX_BITSET((reg), 13, 1, x))
1437
1438// CLAMP [12:12] (1)
1439 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_B 12
1440 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_E 12
1441 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_SZ 1
1442
1443 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_MASK (((1 << 1) - 1) << 31 - 12)
1444 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_LMASK ((1 << 1) - 1)
1445 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_CLAMP_SHIFT 19
1446
1447 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_CLAMP(reg) GX_BITGET((reg), 12, 1)
1448 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_CLAMP(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
1449
1450// SCALE_OR_COMPARE_MODE [10:11] (2)
1451 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_B 10
1452 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_E 11
1453 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_SZ 2
1454
1455 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_MASK (((1 << 2) - 1) << 31 - 11)
1456 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_LMASK ((1 << 2) - 1)
1457 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE_SHIFT 20
1458
1459 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE(reg) GX_BITGET((reg), 10, 2)
1460 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_SCALE_OR_COMPARE_MODE(reg, x) ((reg) = GX_BITSET((reg), 10, 2, x))
1461
1462// DEST [8:9] (2)
1463 /* start bit */ #define GX_BP_TEVCOLORCOMBINER_DEST_B 8
1464 /* end bit */ #define GX_BP_TEVCOLORCOMBINER_DEST_E 9
1465 /* bit size */ #define GX_BP_TEVCOLORCOMBINER_DEST_SZ 2
1466
1467 /* raw mask */ #define GX_BP_TEVCOLORCOMBINER_DEST_MASK (((1 << 2) - 1) << 31 - 9)
1468 /* local mask */ #define GX_BP_TEVCOLORCOMBINER_DEST_LMASK ((1 << 2) - 1)
1469 /* bit shift */ #define GX_BP_TEVCOLORCOMBINER_DEST_SHIFT 22
1470
1471 /* get value */ #define GX_BP_GET_TEVCOLORCOMBINER_DEST(reg) GX_BITGET((reg), 8, 2)
1472 /* set value */ #define GX_BP_SET_TEVCOLORCOMBINER_DEST(reg, x) ((reg) = GX_BITSET((reg), 8, 2, x))
1473
1474
1475/******************************************************************************
1476 * BP structure - TevRegLo
1477 *****************************************************************************/
1478// RED [21:31] (11)
1479 /* start bit */ #define GX_BP_TEVREGLO_RED_B 21
1480 /* end bit */ #define GX_BP_TEVREGLO_RED_E 31
1481 /* bit size */ #define GX_BP_TEVREGLO_RED_SZ 11
1482
1483 /* raw mask */ #define GX_BP_TEVREGLO_RED_MASK (((1 << 11) - 1) << 31 - 31)
1484 /* local mask */ #define GX_BP_TEVREGLO_RED_LMASK ((1 << 11) - 1)
1485 /* bit shift */ #define GX_BP_TEVREGLO_RED_SHIFT 0
1486
1487 /* get value */ #define GX_BP_GET_TEVREGLO_RED(reg) GX_BITGET((reg), 21, 11)
1488 /* set value */ #define GX_BP_SET_TEVREGLO_RED(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
1489
1490// ALPHA [9:19] (11)
1491 /* start bit */ #define GX_BP_TEVREGLO_ALPHA_B 9
1492 /* end bit */ #define GX_BP_TEVREGLO_ALPHA_E 19
1493 /* bit size */ #define GX_BP_TEVREGLO_ALPHA_SZ 11
1494
1495 /* raw mask */ #define GX_BP_TEVREGLO_ALPHA_MASK (((1 << 11) - 1) << 31 - 19)
1496 /* local mask */ #define GX_BP_TEVREGLO_ALPHA_LMASK ((1 << 11) - 1)
1497 /* bit shift */ #define GX_BP_TEVREGLO_ALPHA_SHIFT 12
1498
1499 /* get value */ #define GX_BP_GET_TEVREGLO_ALPHA(reg) GX_BITGET((reg), 9, 11)
1500 /* set value */ #define GX_BP_SET_TEVREGLO_ALPHA(reg, x) ((reg) = GX_BITSET((reg), 9, 11, x))
1501
1502// TYPE [8:8] (1)
1503 /* start bit */ #define GX_BP_TEVREGLO_TYPE_B 8
1504 /* end bit */ #define GX_BP_TEVREGLO_TYPE_E 8
1505 /* bit size */ #define GX_BP_TEVREGLO_TYPE_SZ 1
1506
1507 /* raw mask */ #define GX_BP_TEVREGLO_TYPE_MASK (((1 << 1) - 1) << 31 - 8)
1508 /* local mask */ #define GX_BP_TEVREGLO_TYPE_LMASK ((1 << 1) - 1)
1509 /* bit shift */ #define GX_BP_TEVREGLO_TYPE_SHIFT 23
1510
1511 /* get value */ #define GX_BP_GET_TEVREGLO_TYPE(reg) GX_BITGET((reg), 8, 1)
1512 /* set value */ #define GX_BP_SET_TEVREGLO_TYPE(reg, x) ((reg) = GX_BITSET((reg), 8, 1, x))
1513
1514
1515/******************************************************************************
1516 * BP structure - TevRegHi
1517 *****************************************************************************/
1518// BLUE [21:31] (11)
1519 /* start bit */ #define GX_BP_TEVREGHI_BLUE_B 21
1520 /* end bit */ #define GX_BP_TEVREGHI_BLUE_E 31
1521 /* bit size */ #define GX_BP_TEVREGHI_BLUE_SZ 11
1522
1523 /* raw mask */ #define GX_BP_TEVREGHI_BLUE_MASK (((1 << 11) - 1) << 31 - 31)
1524 /* local mask */ #define GX_BP_TEVREGHI_BLUE_LMASK ((1 << 11) - 1)
1525 /* bit shift */ #define GX_BP_TEVREGHI_BLUE_SHIFT 0
1526
1527 /* get value */ #define GX_BP_GET_TEVREGHI_BLUE(reg) GX_BITGET((reg), 21, 11)
1528 /* set value */ #define GX_BP_SET_TEVREGHI_BLUE(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
1529
1530// GREEN [9:19] (11)
1531 /* start bit */ #define GX_BP_TEVREGHI_GREEN_B 9
1532 /* end bit */ #define GX_BP_TEVREGHI_GREEN_E 19
1533 /* bit size */ #define GX_BP_TEVREGHI_GREEN_SZ 11
1534
1535 /* raw mask */ #define GX_BP_TEVREGHI_GREEN_MASK (((1 << 11) - 1) << 31 - 19)
1536 /* local mask */ #define GX_BP_TEVREGHI_GREEN_LMASK ((1 << 11) - 1)
1537 /* bit shift */ #define GX_BP_TEVREGHI_GREEN_SHIFT 12
1538
1539 /* get value */ #define GX_BP_GET_TEVREGHI_GREEN(reg) GX_BITGET((reg), 9, 11)
1540 /* set value */ #define GX_BP_SET_TEVREGHI_GREEN(reg, x) ((reg) = GX_BITSET((reg), 9, 11, x))
1541
1542// TYPE [8:8] (1)
1543 /* start bit */ #define GX_BP_TEVREGHI_TYPE_B 8
1544 /* end bit */ #define GX_BP_TEVREGHI_TYPE_E 8
1545 /* bit size */ #define GX_BP_TEVREGHI_TYPE_SZ 1
1546
1547 /* raw mask */ #define GX_BP_TEVREGHI_TYPE_MASK (((1 << 1) - 1) << 31 - 8)
1548 /* local mask */ #define GX_BP_TEVREGHI_TYPE_LMASK ((1 << 1) - 1)
1549 /* bit shift */ #define GX_BP_TEVREGHI_TYPE_SHIFT 23
1550
1551 /* get value */ #define GX_BP_GET_TEVREGHI_TYPE(reg) GX_BITGET((reg), 8, 1)
1552 /* set value */ #define GX_BP_SET_TEVREGHI_TYPE(reg, x) ((reg) = GX_BITSET((reg), 8, 1, x))
1553
1554
1555/******************************************************************************
1556 * BP register 0xE8 - FogRange
1557 *****************************************************************************/
1558// CENTER [22:31] (10)
1559 /* start bit */ #define GX_BP_FOGRANGE_CENTER_B 22
1560 /* end bit */ #define GX_BP_FOGRANGE_CENTER_E 31
1561 /* bit size */ #define GX_BP_FOGRANGE_CENTER_SZ 10
1562
1563 /* raw mask */ #define GX_BP_FOGRANGE_CENTER_MASK (((1 << 10) - 1) << 31 - 31)
1564 /* local mask */ #define GX_BP_FOGRANGE_CENTER_LMASK ((1 << 10) - 1)
1565 /* bit shift */ #define GX_BP_FOGRANGE_CENTER_SHIFT 0
1566
1567 /* get value */ #define GX_BP_GET_FOGRANGE_CENTER(reg) GX_BITGET((reg), 22, 10)
1568 /* set value */ #define GX_BP_SET_FOGRANGE_CENTER(reg, x) ((reg) = GX_BITSET((reg), 22, 10, x))
1569
1570// ENABLED [21:21] (1)
1571 /* start bit */ #define GX_BP_FOGRANGE_ENABLED_B 21
1572 /* end bit */ #define GX_BP_FOGRANGE_ENABLED_E 21
1573 /* bit size */ #define GX_BP_FOGRANGE_ENABLED_SZ 1
1574
1575 /* raw mask */ #define GX_BP_FOGRANGE_ENABLED_MASK (((1 << 1) - 1) << 31 - 21)
1576 /* local mask */ #define GX_BP_FOGRANGE_ENABLED_LMASK ((1 << 1) - 1)
1577 /* bit shift */ #define GX_BP_FOGRANGE_ENABLED_SHIFT 10
1578
1579 /* get value */ #define GX_BP_GET_FOGRANGE_ENABLED(reg) GX_BITGET((reg), 21, 1)
1580 /* set value */ #define GX_BP_SET_FOGRANGE_ENABLED(reg, x) ((reg) = GX_BITSET((reg), 21, 1, x))
1581
1582
1583/******************************************************************************
1584 * BP structure - FogRangeK
1585 *****************************************************************************/
1586// HI [20:31] (12)
1587 /* start bit */ #define GX_BP_FOGRANGEK_HI_B 20
1588 /* end bit */ #define GX_BP_FOGRANGEK_HI_E 31
1589 /* bit size */ #define GX_BP_FOGRANGEK_HI_SZ 12
1590
1591 /* raw mask */ #define GX_BP_FOGRANGEK_HI_MASK (((1 << 12) - 1) << 31 - 31)
1592 /* local mask */ #define GX_BP_FOGRANGEK_HI_LMASK ((1 << 12) - 1)
1593 /* bit shift */ #define GX_BP_FOGRANGEK_HI_SHIFT 0
1594
1595 /* get value */ #define GX_BP_GET_FOGRANGEK_HI(reg) GX_BITGET((reg), 20, 12)
1596 /* set value */ #define GX_BP_SET_FOGRANGEK_HI(reg, x) ((reg) = GX_BITSET((reg), 20, 12, x))
1597
1598// LO [8:19] (12)
1599 /* start bit */ #define GX_BP_FOGRANGEK_LO_B 8
1600 /* end bit */ #define GX_BP_FOGRANGEK_LO_E 19
1601 /* bit size */ #define GX_BP_FOGRANGEK_LO_SZ 12
1602
1603 /* raw mask */ #define GX_BP_FOGRANGEK_LO_MASK (((1 << 12) - 1) << 31 - 19)
1604 /* local mask */ #define GX_BP_FOGRANGEK_LO_LMASK ((1 << 12) - 1)
1605 /* bit shift */ #define GX_BP_FOGRANGEK_LO_SHIFT 12
1606
1607 /* get value */ #define GX_BP_GET_FOGRANGEK_LO(reg) GX_BITGET((reg), 8, 12)
1608 /* set value */ #define GX_BP_SET_FOGRANGEK_LO(reg, x) ((reg) = GX_BITSET((reg), 8, 12, x))
1609
1610
1611/******************************************************************************
1612 * BP register 0xEE - FogParam0
1613 *****************************************************************************/
1614// A_MANT [21:31] (11)
1615 /* start bit */ #define GX_BP_FOGPARAM0_A_MANT_B 21
1616 /* end bit */ #define GX_BP_FOGPARAM0_A_MANT_E 31
1617 /* bit size */ #define GX_BP_FOGPARAM0_A_MANT_SZ 11
1618
1619 /* raw mask */ #define GX_BP_FOGPARAM0_A_MANT_MASK (((1 << 11) - 1) << 31 - 31)
1620 /* local mask */ #define GX_BP_FOGPARAM0_A_MANT_LMASK ((1 << 11) - 1)
1621 /* bit shift */ #define GX_BP_FOGPARAM0_A_MANT_SHIFT 0
1622
1623 /* get value */ #define GX_BP_GET_FOGPARAM0_A_MANT(reg) GX_BITGET((reg), 21, 11)
1624 /* set value */ #define GX_BP_SET_FOGPARAM0_A_MANT(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
1625
1626// A_EXP [13:20] (8)
1627 /* start bit */ #define GX_BP_FOGPARAM0_A_EXP_B 13
1628 /* end bit */ #define GX_BP_FOGPARAM0_A_EXP_E 20
1629 /* bit size */ #define GX_BP_FOGPARAM0_A_EXP_SZ 8
1630
1631 /* raw mask */ #define GX_BP_FOGPARAM0_A_EXP_MASK (((1 << 8) - 1) << 31 - 20)
1632 /* local mask */ #define GX_BP_FOGPARAM0_A_EXP_LMASK ((1 << 8) - 1)
1633 /* bit shift */ #define GX_BP_FOGPARAM0_A_EXP_SHIFT 11
1634
1635 /* get value */ #define GX_BP_GET_FOGPARAM0_A_EXP(reg) GX_BITGET((reg), 13, 8)
1636 /* set value */ #define GX_BP_SET_FOGPARAM0_A_EXP(reg, x) ((reg) = GX_BITSET((reg), 13, 8, x))
1637
1638// A_SIGN [12:12] (1)
1639 /* start bit */ #define GX_BP_FOGPARAM0_A_SIGN_B 12
1640 /* end bit */ #define GX_BP_FOGPARAM0_A_SIGN_E 12
1641 /* bit size */ #define GX_BP_FOGPARAM0_A_SIGN_SZ 1
1642
1643 /* raw mask */ #define GX_BP_FOGPARAM0_A_SIGN_MASK (((1 << 1) - 1) << 31 - 12)
1644 /* local mask */ #define GX_BP_FOGPARAM0_A_SIGN_LMASK ((1 << 1) - 1)
1645 /* bit shift */ #define GX_BP_FOGPARAM0_A_SIGN_SHIFT 19
1646
1647 /* get value */ #define GX_BP_GET_FOGPARAM0_A_SIGN(reg) GX_BITGET((reg), 12, 1)
1648 /* set value */ #define GX_BP_SET_FOGPARAM0_A_SIGN(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
1649
1650
1651/******************************************************************************
1652 * BP register 0xEF - FogParam1
1653 *****************************************************************************/
1654// B_MAG [8:31] (24)
1655 /* start bit */ #define GX_BP_FOGPARAM1_B_MAG_B 8
1656 /* end bit */ #define GX_BP_FOGPARAM1_B_MAG_E 31
1657 /* bit size */ #define GX_BP_FOGPARAM1_B_MAG_SZ 24
1658
1659 /* raw mask */ #define GX_BP_FOGPARAM1_B_MAG_MASK (((1 << 24) - 1) << 31 - 31)
1660 /* local mask */ #define GX_BP_FOGPARAM1_B_MAG_LMASK ((1 << 24) - 1)
1661 /* bit shift */ #define GX_BP_FOGPARAM1_B_MAG_SHIFT 0
1662
1663 /* get value */ #define GX_BP_GET_FOGPARAM1_B_MAG(reg) GX_BITGET((reg), 8, 24)
1664 /* set value */ #define GX_BP_SET_FOGPARAM1_B_MAG(reg, x) ((reg) = GX_BITSET((reg), 8, 24, x))
1665
1666
1667/******************************************************************************
1668 * BP register 0xF0 - FogParam2
1669 *****************************************************************************/
1670// B_SHIFT [27:31] (5)
1671 /* start bit */ #define GX_BP_FOGPARAM2_B_SHIFT_B 27
1672 /* end bit */ #define GX_BP_FOGPARAM2_B_SHIFT_E 31
1673 /* bit size */ #define GX_BP_FOGPARAM2_B_SHIFT_SZ 5
1674
1675 /* raw mask */ #define GX_BP_FOGPARAM2_B_SHIFT_MASK (((1 << 5) - 1) << 31 - 31)
1676 /* local mask */ #define GX_BP_FOGPARAM2_B_SHIFT_LMASK ((1 << 5) - 1)
1677 /* bit shift */ #define GX_BP_FOGPARAM2_B_SHIFT_SHIFT 0
1678
1679 /* get value */ #define GX_BP_GET_FOGPARAM2_B_SHIFT(reg) GX_BITGET((reg), 27, 5)
1680 /* set value */ #define GX_BP_SET_FOGPARAM2_B_SHIFT(reg, x) ((reg) = GX_BITSET((reg), 27, 5, x))
1681
1682
1683/******************************************************************************
1684 * BP register 0xF1 - FogParam3
1685 *****************************************************************************/
1686// C_MANT [21:31] (11)
1687 /* start bit */ #define GX_BP_FOGPARAM3_C_MANT_B 21
1688 /* end bit */ #define GX_BP_FOGPARAM3_C_MANT_E 31
1689 /* bit size */ #define GX_BP_FOGPARAM3_C_MANT_SZ 11
1690
1691 /* raw mask */ #define GX_BP_FOGPARAM3_C_MANT_MASK (((1 << 11) - 1) << 31 - 31)
1692 /* local mask */ #define GX_BP_FOGPARAM3_C_MANT_LMASK ((1 << 11) - 1)
1693 /* bit shift */ #define GX_BP_FOGPARAM3_C_MANT_SHIFT 0
1694
1695 /* get value */ #define GX_BP_GET_FOGPARAM3_C_MANT(reg) GX_BITGET((reg), 21, 11)
1696 /* set value */ #define GX_BP_SET_FOGPARAM3_C_MANT(reg, x) ((reg) = GX_BITSET((reg), 21, 11, x))
1697
1698// C_EXP [13:20] (8)
1699 /* start bit */ #define GX_BP_FOGPARAM3_C_EXP_B 13
1700 /* end bit */ #define GX_BP_FOGPARAM3_C_EXP_E 20
1701 /* bit size */ #define GX_BP_FOGPARAM3_C_EXP_SZ 8
1702
1703 /* raw mask */ #define GX_BP_FOGPARAM3_C_EXP_MASK (((1 << 8) - 1) << 31 - 20)
1704 /* local mask */ #define GX_BP_FOGPARAM3_C_EXP_LMASK ((1 << 8) - 1)
1705 /* bit shift */ #define GX_BP_FOGPARAM3_C_EXP_SHIFT 11
1706
1707 /* get value */ #define GX_BP_GET_FOGPARAM3_C_EXP(reg) GX_BITGET((reg), 13, 8)
1708 /* set value */ #define GX_BP_SET_FOGPARAM3_C_EXP(reg, x) ((reg) = GX_BITSET((reg), 13, 8, x))
1709
1710// C_SIGN [12:12] (1)
1711 /* start bit */ #define GX_BP_FOGPARAM3_C_SIGN_B 12
1712 /* end bit */ #define GX_BP_FOGPARAM3_C_SIGN_E 12
1713 /* bit size */ #define GX_BP_FOGPARAM3_C_SIGN_SZ 1
1714
1715 /* raw mask */ #define GX_BP_FOGPARAM3_C_SIGN_MASK (((1 << 1) - 1) << 31 - 12)
1716 /* local mask */ #define GX_BP_FOGPARAM3_C_SIGN_LMASK ((1 << 1) - 1)
1717 /* bit shift */ #define GX_BP_FOGPARAM3_C_SIGN_SHIFT 19
1718
1719 /* get value */ #define GX_BP_GET_FOGPARAM3_C_SIGN(reg) GX_BITGET((reg), 12, 1)
1720 /* set value */ #define GX_BP_SET_FOGPARAM3_C_SIGN(reg, x) ((reg) = GX_BITSET((reg), 12, 1, x))
1721
1722// PROJ [11:11] (1)
1723 /* start bit */ #define GX_BP_FOGPARAM3_PROJ_B 11
1724 /* end bit */ #define GX_BP_FOGPARAM3_PROJ_E 11
1725 /* bit size */ #define GX_BP_FOGPARAM3_PROJ_SZ 1
1726
1727 /* raw mask */ #define GX_BP_FOGPARAM3_PROJ_MASK (((1 << 1) - 1) << 31 - 11)
1728 /* local mask */ #define GX_BP_FOGPARAM3_PROJ_LMASK ((1 << 1) - 1)
1729 /* bit shift */ #define GX_BP_FOGPARAM3_PROJ_SHIFT 20
1730
1731 /* get value */ #define GX_BP_GET_FOGPARAM3_PROJ(reg) GX_BITGET((reg), 11, 1)
1732 /* set value */ #define GX_BP_SET_FOGPARAM3_PROJ(reg, x) ((reg) = GX_BITSET((reg), 11, 1, x))
1733
1734// FSEL [8:10] (3)
1735 /* start bit */ #define GX_BP_FOGPARAM3_FSEL_B 8
1736 /* end bit */ #define GX_BP_FOGPARAM3_FSEL_E 10
1737 /* bit size */ #define GX_BP_FOGPARAM3_FSEL_SZ 3
1738
1739 /* raw mask */ #define GX_BP_FOGPARAM3_FSEL_MASK (((1 << 3) - 1) << 31 - 10)
1740 /* local mask */ #define GX_BP_FOGPARAM3_FSEL_LMASK ((1 << 3) - 1)
1741 /* bit shift */ #define GX_BP_FOGPARAM3_FSEL_SHIFT 21
1742
1743 /* get value */ #define GX_BP_GET_FOGPARAM3_FSEL(reg) GX_BITGET((reg), 8, 3)
1744 /* set value */ #define GX_BP_SET_FOGPARAM3_FSEL(reg, x) ((reg) = GX_BITSET((reg), 8, 3, x))
1745
1746
1747/******************************************************************************
1748 * BP register 0xF2 - FogColor
1749 *****************************************************************************/
1750// RGB [8:31] (24)
1751 /* start bit */ #define GX_BP_FOGCOLOR_RGB_B 8
1752 /* end bit */ #define GX_BP_FOGCOLOR_RGB_E 31
1753 /* bit size */ #define GX_BP_FOGCOLOR_RGB_SZ 24
1754
1755 /* raw mask */ #define GX_BP_FOGCOLOR_RGB_MASK (((1 << 24) - 1) << 31 - 31)
1756 /* local mask */ #define GX_BP_FOGCOLOR_RGB_LMASK ((1 << 24) - 1)
1757 /* bit shift */ #define GX_BP_FOGCOLOR_RGB_SHIFT 0
1758
1759 /* get value */ #define GX_BP_GET_FOGCOLOR_RGB(reg) GX_BITGET((reg), 8, 24)
1760 /* set value */ #define GX_BP_SET_FOGCOLOR_RGB(reg, x) ((reg) = GX_BITSET((reg), 8, 24, x))
1761
1762
1763/******************************************************************************
1764 * BP register 0xF3 - AlphaCompare
1765 *****************************************************************************/
1766// REF0 [24:31] (8)
1767 /* start bit */ #define GX_BP_ALPHACOMPARE_REF0_B 24
1768 /* end bit */ #define GX_BP_ALPHACOMPARE_REF0_E 31
1769 /* bit size */ #define GX_BP_ALPHACOMPARE_REF0_SZ 8
1770
1771 /* raw mask */ #define GX_BP_ALPHACOMPARE_REF0_MASK (((1 << 8) - 1) << 31 - 31)
1772 /* local mask */ #define GX_BP_ALPHACOMPARE_REF0_LMASK ((1 << 8) - 1)
1773 /* bit shift */ #define GX_BP_ALPHACOMPARE_REF0_SHIFT 0
1774
1775 /* get value */ #define GX_BP_GET_ALPHACOMPARE_REF0(reg) GX_BITGET((reg), 24, 8)
1776 /* set value */ #define GX_BP_SET_ALPHACOMPARE_REF0(reg, x) ((reg) = GX_BITSET((reg), 24, 8, x))
1777
1778// REF1 [16:23] (8)
1779 /* start bit */ #define GX_BP_ALPHACOMPARE_REF1_B 16
1780 /* end bit */ #define GX_BP_ALPHACOMPARE_REF1_E 23
1781 /* bit size */ #define GX_BP_ALPHACOMPARE_REF1_SZ 8
1782
1783 /* raw mask */ #define GX_BP_ALPHACOMPARE_REF1_MASK (((1 << 8) - 1) << 31 - 23)
1784 /* local mask */ #define GX_BP_ALPHACOMPARE_REF1_LMASK ((1 << 8) - 1)
1785 /* bit shift */ #define GX_BP_ALPHACOMPARE_REF1_SHIFT 8
1786
1787 /* get value */ #define GX_BP_GET_ALPHACOMPARE_REF1(reg) GX_BITGET((reg), 16, 8)
1788 /* set value */ #define GX_BP_SET_ALPHACOMPARE_REF1(reg, x) ((reg) = GX_BITSET((reg), 16, 8, x))
1789
1790// COMP0 [13:15] (3)
1791 /* start bit */ #define GX_BP_ALPHACOMPARE_COMP0_B 13
1792 /* end bit */ #define GX_BP_ALPHACOMPARE_COMP0_E 15
1793 /* bit size */ #define GX_BP_ALPHACOMPARE_COMP0_SZ 3
1794
1795 /* raw mask */ #define GX_BP_ALPHACOMPARE_COMP0_MASK (((1 << 3) - 1) << 31 - 15)
1796 /* local mask */ #define GX_BP_ALPHACOMPARE_COMP0_LMASK ((1 << 3) - 1)
1797 /* bit shift */ #define GX_BP_ALPHACOMPARE_COMP0_SHIFT 16
1798
1799 /* get value */ #define GX_BP_GET_ALPHACOMPARE_COMP0(reg) GX_BITGET((reg), 13, 3)
1800 /* set value */ #define GX_BP_SET_ALPHACOMPARE_COMP0(reg, x) ((reg) = GX_BITSET((reg), 13, 3, x))
1801
1802// COMP1 [10:12] (3)
1803 /* start bit */ #define GX_BP_ALPHACOMPARE_COMP1_B 10
1804 /* end bit */ #define GX_BP_ALPHACOMPARE_COMP1_E 12
1805 /* bit size */ #define GX_BP_ALPHACOMPARE_COMP1_SZ 3
1806
1807 /* raw mask */ #define GX_BP_ALPHACOMPARE_COMP1_MASK (((1 << 3) - 1) << 31 - 12)
1808 /* local mask */ #define GX_BP_ALPHACOMPARE_COMP1_LMASK ((1 << 3) - 1)
1809 /* bit shift */ #define GX_BP_ALPHACOMPARE_COMP1_SHIFT 19
1810
1811 /* get value */ #define GX_BP_GET_ALPHACOMPARE_COMP1(reg) GX_BITGET((reg), 10, 3)
1812 /* set value */ #define GX_BP_SET_ALPHACOMPARE_COMP1(reg, x) ((reg) = GX_BITSET((reg), 10, 3, x))
1813
1814// LOGIC [8:9] (2)
1815 /* start bit */ #define GX_BP_ALPHACOMPARE_LOGIC_B 8
1816 /* end bit */ #define GX_BP_ALPHACOMPARE_LOGIC_E 9
1817 /* bit size */ #define GX_BP_ALPHACOMPARE_LOGIC_SZ 2
1818
1819 /* raw mask */ #define GX_BP_ALPHACOMPARE_LOGIC_MASK (((1 << 2) - 1) << 31 - 9)
1820 /* local mask */ #define GX_BP_ALPHACOMPARE_LOGIC_LMASK ((1 << 2) - 1)
1821 /* bit shift */ #define GX_BP_ALPHACOMPARE_LOGIC_SHIFT 22
1822
1823 /* get value */ #define GX_BP_GET_ALPHACOMPARE_LOGIC(reg) GX_BITGET((reg), 8, 2)
1824 /* set value */ #define GX_BP_SET_ALPHACOMPARE_LOGIC(reg, x) ((reg) = GX_BITSET((reg), 8, 2, x))
1825
1826
1827/******************************************************************************
1828 * BP structure - TevKSel
1829 *****************************************************************************/
1830// SWAP_RB [30:31] (2) - Odd ksel number: red; even: blue
1831 /* start bit */ #define GX_BP_TEVKSEL_SWAP_RB_B 30
1832 /* end bit */ #define GX_BP_TEVKSEL_SWAP_RB_E 31
1833 /* bit size */ #define GX_BP_TEVKSEL_SWAP_RB_SZ 2
1834
1835 /* raw mask */ #define GX_BP_TEVKSEL_SWAP_RB_MASK (((1 << 2) - 1) << 31 - 31)
1836 /* local mask */ #define GX_BP_TEVKSEL_SWAP_RB_LMASK ((1 << 2) - 1)
1837 /* bit shift */ #define GX_BP_TEVKSEL_SWAP_RB_SHIFT 0
1838
1839 /* get value */ #define GX_BP_GET_TEVKSEL_SWAP_RB(reg) GX_BITGET((reg), 30, 2)
1840 /* set value */ #define GX_BP_SET_TEVKSEL_SWAP_RB(reg, x) ((reg) = GX_BITSET((reg), 30, 2, x))
1841
1842// SWAP_GA [28:29] (2) - Odd ksel number: green; even: alpha
1843 /* start bit */ #define GX_BP_TEVKSEL_SWAP_GA_B 28
1844 /* end bit */ #define GX_BP_TEVKSEL_SWAP_GA_E 29
1845 /* bit size */ #define GX_BP_TEVKSEL_SWAP_GA_SZ 2
1846
1847 /* raw mask */ #define GX_BP_TEVKSEL_SWAP_GA_MASK (((1 << 2) - 1) << 31 - 29)
1848 /* local mask */ #define GX_BP_TEVKSEL_SWAP_GA_LMASK ((1 << 2) - 1)
1849 /* bit shift */ #define GX_BP_TEVKSEL_SWAP_GA_SHIFT 2
1850
1851 /* get value */ #define GX_BP_GET_TEVKSEL_SWAP_GA(reg) GX_BITGET((reg), 28, 2)
1852 /* set value */ #define GX_BP_SET_TEVKSEL_SWAP_GA(reg, x) ((reg) = GX_BITSET((reg), 28, 2, x))
1853
1854// KCSEL_EVEN [23:27] (5)
1855 /* start bit */ #define GX_BP_TEVKSEL_KCSEL_EVEN_B 23
1856 /* end bit */ #define GX_BP_TEVKSEL_KCSEL_EVEN_E 27
1857 /* bit size */ #define GX_BP_TEVKSEL_KCSEL_EVEN_SZ 5
1858
1859 /* raw mask */ #define GX_BP_TEVKSEL_KCSEL_EVEN_MASK (((1 << 5) - 1) << 31 - 27)
1860 /* local mask */ #define GX_BP_TEVKSEL_KCSEL_EVEN_LMASK ((1 << 5) - 1)
1861 /* bit shift */ #define GX_BP_TEVKSEL_KCSEL_EVEN_SHIFT 4
1862
1863 /* get value */ #define GX_BP_GET_TEVKSEL_KCSEL_EVEN(reg) GX_BITGET((reg), 23, 5)
1864 /* set value */ #define GX_BP_SET_TEVKSEL_KCSEL_EVEN(reg, x) ((reg) = GX_BITSET((reg), 23, 5, x))
1865
1866// KASEL_EVEN [18:22] (5)
1867 /* start bit */ #define GX_BP_TEVKSEL_KASEL_EVEN_B 18
1868 /* end bit */ #define GX_BP_TEVKSEL_KASEL_EVEN_E 22
1869 /* bit size */ #define GX_BP_TEVKSEL_KASEL_EVEN_SZ 5
1870
1871 /* raw mask */ #define GX_BP_TEVKSEL_KASEL_EVEN_MASK (((1 << 5) - 1) << 31 - 22)
1872 /* local mask */ #define GX_BP_TEVKSEL_KASEL_EVEN_LMASK ((1 << 5) - 1)
1873 /* bit shift */ #define GX_BP_TEVKSEL_KASEL_EVEN_SHIFT 9
1874
1875 /* get value */ #define GX_BP_GET_TEVKSEL_KASEL_EVEN(reg) GX_BITGET((reg), 18, 5)
1876 /* set value */ #define GX_BP_SET_TEVKSEL_KASEL_EVEN(reg, x) ((reg) = GX_BITSET((reg), 18, 5, x))
1877
1878// KCSEL_ODD [13:17] (5)
1879 /* start bit */ #define GX_BP_TEVKSEL_KCSEL_ODD_B 13
1880 /* end bit */ #define GX_BP_TEVKSEL_KCSEL_ODD_E 17
1881 /* bit size */ #define GX_BP_TEVKSEL_KCSEL_ODD_SZ 5
1882
1883 /* raw mask */ #define GX_BP_TEVKSEL_KCSEL_ODD_MASK (((1 << 5) - 1) << 31 - 17)
1884 /* local mask */ #define GX_BP_TEVKSEL_KCSEL_ODD_LMASK ((1 << 5) - 1)
1885 /* bit shift */ #define GX_BP_TEVKSEL_KCSEL_ODD_SHIFT 14
1886
1887 /* get value */ #define GX_BP_GET_TEVKSEL_KCSEL_ODD(reg) GX_BITGET((reg), 13, 5)
1888 /* set value */ #define GX_BP_SET_TEVKSEL_KCSEL_ODD(reg, x) ((reg) = GX_BITSET((reg), 13, 5, x))
1889
1890// KASEL_ODD [8:12] (5)
1891 /* start bit */ #define GX_BP_TEVKSEL_KASEL_ODD_B 8
1892 /* end bit */ #define GX_BP_TEVKSEL_KASEL_ODD_E 12
1893 /* bit size */ #define GX_BP_TEVKSEL_KASEL_ODD_SZ 5
1894
1895 /* raw mask */ #define GX_BP_TEVKSEL_KASEL_ODD_MASK (((1 << 5) - 1) << 31 - 12)
1896 /* local mask */ #define GX_BP_TEVKSEL_KASEL_ODD_LMASK ((1 << 5) - 1)
1897 /* bit shift */ #define GX_BP_TEVKSEL_KASEL_ODD_SHIFT 19
1898
1899 /* get value */ #define GX_BP_GET_TEVKSEL_KASEL_ODD(reg) GX_BITGET((reg), 8, 5)
1900 /* set value */ #define GX_BP_SET_TEVKSEL_KASEL_ODD(reg, x) ((reg) = GX_BITSET((reg), 8, 5, x))
1901
1902
1903
1904#ifdef __cplusplus
1905}
1906#endif
1907#endif