14#ifndef RVL_SDK_GX_HARDWARE_H 
   15#define RVL_SDK_GX_HARDWARE_H 
   18#include <revolution/GX/GXTypes.h> 
   34extern volatile union {
 
   46} WGPIPE AT_ADDRESS(0xCC008000);
 
   52    GX_FIFO_CMD_NOOP = 0x00,
 
   54    GX_FIFO_CMD_LOAD_BP_REG = 0x61,
 
   55    GX_FIFO_CMD_LOAD_CP_REG = 0x08,
 
   56    GX_FIFO_CMD_LOAD_XF_REG = 0x10,
 
   58    GX_FIFO_CMD_LOAD_INDX_A = 0x20,
 
   59    GX_FIFO_CMD_LOAD_INDX_B = 0x28,
 
   60    GX_FIFO_CMD_LOAD_INDX_C = 0x30,
 
   61    GX_FIFO_CMD_LOAD_INDX_D = 0x38,
 
   63    GX_FIFO_CMD_CALL_DL = 0x40,
 
   64    GX_FIFO_CMD_INVAL_VTX = 0x48,
 
   66    GX_FIFO_CMD_DRAW_POINTS = GX_POINTS,
 
   67    GX_FIFO_CMD_DRAW_LINES = GX_LINES,
 
   68    GX_FIFO_CMD_DRAW_LINESTRIP = GX_LINESTRIP,
 
   69    GX_FIFO_CMD_DRAW_TRIANGLES = GX_TRIANGLES,
 
   70    GX_FIFO_CMD_DRAW_TRIANGLESTRIP = GX_TRIANGLESTRIP,
 
   71    GX_FIFO_CMD_DRAW_TRIANGLEFAN = GX_TRIANGLEFAN,
 
   72    GX_FIFO_CMD_DRAW_QUADS = GX_QUADS,
 
   78#define GX_FIFO_CMD_LOAD_INDX_SIZE 5 
   79#define GX_FIFO_CMD_DRAW_SIZE 3 
   81#define __GX_FIFO_SET_LOAD_INDX_DST(reg, x) ((reg) = GX_BITSET(reg, 20, 12, x)) 
   82#define __GX_FIFO_SET_LOAD_INDX_NELEM(reg, x) ((reg) = GX_BITSET(reg, 16, 4, x)) 
   83#define __GX_FIFO_SET_LOAD_INDX_INDEX(reg, x) ((reg) = GX_BITSET(reg, 0, 16, x)) 
   85#define __GX_FIFO_LOAD_INDX(reg, dst, nelem, index)                            \ 
   88        __GX_FIFO_SET_LOAD_INDX_DST(cmd, dst);                                 \ 
   89        __GX_FIFO_SET_LOAD_INDX_NELEM(cmd, nelem);                             \ 
   90        __GX_FIFO_SET_LOAD_INDX_INDEX(cmd, index);                             \ 
   95#define GX_FIFO_LOAD_INDX_A(dst, nelem, index)                                 \ 
   96    __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_A, dst, nelem, index) 
   98#define GX_FIFO_LOAD_INDX_B(dst, nelem, index)                                 \ 
   99    __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_B, dst, nelem, index) 
  101#define GX_FIFO_LOAD_INDX_C(dst, nelem, index)                                 \ 
  102    __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_C, dst, nelem, index) 
  104#define GX_FIFO_LOAD_INDX_D(dst, nelem, index)                                 \ 
  105    __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_D, dst, nelem, index) 
  118#define GX_BP_LOAD_REG(data)                                                   \ 
  119    WGPIPE.c = GX_FIFO_CMD_LOAD_BP_REG;                                        \ 
  125#define GX_BP_SET_OPCODE(cmd, opcode) (cmd) = GX_BITSET(cmd, 0, 8, (opcode)) 
  127#define GX_BP_OPCODE_SHIFT 24 
  128#define GX_BP_CMD_SZ (sizeof(u8) + sizeof(u32)) 
  141#define GX_CP_LOAD_REG(addr, data)                                             \ 
  142    WGPIPE.c = GX_FIFO_CMD_LOAD_CP_REG;                                        \ 
  146#define GX_CP_CMD_SZ (sizeof(u8) + sizeof(u8) + sizeof(u32)) 
  160    GX_XF_MEM_POSMTX = 0x0000,
 
  161    GX_XF_MEM_NRMMTX = 0x0400,
 
  162    GX_XF_MEM_DUALTEXMTX = 0x0500,
 
  163    GX_XF_MEM_LIGHTOBJ = 0x0600
 
  169#define GX_XF_LOAD_REG_HDR(addr)                                               \ 
  170    WGPIPE.c = GX_FIFO_CMD_LOAD_XF_REG;                                        \ 
  176#define GX_XF_LOAD_REG(addr, data)                                             \ 
  177    GX_XF_LOAD_REG_HDR(addr);                                                  \ 
  180#define GX_XF_CMD_SZ (sizeof(u8) + sizeof(u32) + sizeof(u32)) 
  185#define GX_XF_LOAD_REGS(size, addr)                                            \ 
  189        cmd |= (size) << 16;                                                   \ 
  190        GX_XF_LOAD_REG_HDR(cmd);                                               \ 
  223    GX_RAS_ALPHA_BUMP = 5,